Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 016116/0011 | |
| Pages: | 12 |
| | Recorded: | 01/03/2005 | | |
| Conveyance: | SECURITY AGREEMENT |
|
|
Total properties:
10
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
08592697
|
Filing Dt:
|
01/26/1996
|
|
Title:
|
INTERPROCESS COMMUNICATION PROTOCOL SYSTEM MODEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08735681
|
Filing Dt:
|
10/23/1996
|
|
Title:
|
DESIGN ENVIRONMENT AND A DESIGN METHOD FOR HARDWARE/SOFTWARE CO-DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2001
|
Application #:
|
09360041
|
Filing Dt:
|
07/23/1999
|
|
Title:
|
METHOD FOR DETERMINING AN OPTIMIZED DATA ORGANIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
10309554
|
Filing Dt:
|
12/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR INSTRUCTION-SET ARCHITECTURE SIMULATION USING JUST IN TIME COMPILATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
10641457
|
Filing Dt:
|
08/14/2003
|
|
Title:
|
AUTOMATIC GENERATION OF STRUCTURE AND CONTROL PATH USING HARDWARE DESCRIPTION LANGUAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
10700600
|
Filing Dt:
|
11/03/2003
|
|
Title:
|
METHOD OF PROTOCOL CONVERSION BETWEEN SYNCHRONOUS PROTOCOLS THAT ARE SUITABLE FOR SYNTHESIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
10700601
|
Filing Dt:
|
11/03/2003
|
|
Title:
|
AUTOMATIC GENERATION OF TRANSACTION LEVEL BUS SIMULATION INSTRUCTIONS FROM BUS PROTOCOL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
10815228
|
Filing Dt:
|
03/30/2004
|
|
Title:
|
Generation of compiler description from architecture description
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
10937068
|
Filing Dt:
|
09/08/2004
|
|
Title:
|
DETERMINING LARGE-SCALE FINITE STATE MACHINES USING CONSTRAINT RELAXATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
10976402
|
Filing Dt:
|
10/28/2004
|
|
Title:
|
TRANSACTION LEVEL MODEL SYNTHESIS
|
|
|
Assignee
|
|
|
|
|
| 2010 NORTH FIRST STREET |
| SAN JOSE, CALIFORNIA 95131 |
|
|
Correspondence name and address
|
| |
GREENE RADOVSKY MALSONEY & SHARE LLP
|
| |
RUSSELL D. POLLOCK, ESQ.
|
| |
FOUR EMBARCADERO CENTER, SUITE 4000
|
| |
SAN FRANCISCO, CA 94111
|
Search Results as of:
05/21/2024 01:35 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
