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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:016345/0981   Pages: 13
Recorded: 08/04/2005
Conveyance: PATENT COLLATERAL ASSIGNMENT AND SECURITY INTEREST
Total properties: 18
1
Patent #:
Issue Dt:
09/27/1988
Application #:
07069426
Filing Dt:
07/01/1987
Title:
INTEGRATED MAGNETIC RESONANT POWER CONVERTER
2
Patent #:
Issue Dt:
09/27/1988
Application #:
07069426
Filing Dt:
07/01/1987
Title:
INTEGRATED MAGNETIC RESONANT POWER CONVERTER
3
Patent #:
Issue Dt:
01/05/1993
Application #:
07778311
Filing Dt:
10/16/1991
Title:
ZERO VOLTAGE, ZERO CURRENT, RESONANT CONVERTER
4
Patent #:
Issue Dt:
01/05/1993
Application #:
07778311
Filing Dt:
10/16/1991
Title:
ZERO VOLTAGE, ZERO CURRENT, RESONANT CONVERTER
5
Patent #:
Issue Dt:
01/16/1996
Application #:
08117818
Filing Dt:
09/08/1993
Title:
RESONANT POWER CONVERTER FOR CHANGING THE MAGNITUDE OF A DC VOLTAGE
6
Patent #:
Issue Dt:
01/16/1996
Application #:
08117818
Filing Dt:
09/08/1993
Title:
RESONANT POWER CONVERTER FOR CHANGING THE MAGNITUDE OF A DC VOLTAGE
7
Patent #:
Issue Dt:
01/25/2000
Application #:
08838328
Filing Dt:
04/08/1997
Title:
MULTI-RESONANT DC-TO DC CONVERTER
8
Patent #:
Issue Dt:
01/25/2000
Application #:
08838328
Filing Dt:
04/08/1997
Title:
MULTI-RESONANT DC-TO DC CONVERTER
9
Patent #:
Issue Dt:
04/06/1999
Application #:
08838332
Filing Dt:
04/08/1997
Title:
GAS DISCHARGE LAMP WITH ACTIVE CREST FACTOR CORRECTION
10
Patent #:
Issue Dt:
09/12/2000
Application #:
08909489
Filing Dt:
08/12/1997
Title:
MEMORY MODULE ASSEMBLY USING PARTIALLY DEFECTIVE CHIPS
11
Patent #:
Issue Dt:
09/12/2000
Application #:
08909489
Filing Dt:
08/12/1997
Title:
MEMORY MODULE ASSEMBLY USING PARTIALLY DEFECTIVE CHIPS
12
Patent #:
Issue Dt:
03/14/2006
Application #:
10242536
Filing Dt:
09/11/2002
Title:
MEMORY MODULE ASSEMBLY USING PARTIALLY DEFECTIVE CHIPS
13
Patent #:
Issue Dt:
06/13/2006
Application #:
10371663
Filing Dt:
02/20/2003
Publication #:
Pub Dt:
08/28/2003
Title:
PATCHING METHODS AND APPARATUS FOR FABRICATING MEMORY MODULES
14
Patent #:
NONE
Issue Dt:
Application #:
10371736
Filing Dt:
02/20/2003
Publication #:
Pub Dt:
08/28/2003
Title:
Method and apparatus for implementing a selectively operable clock booster for DDR memory or other logic modules which utilize partially-defective memory parts, or a combination of partially-defective and flawless memory parts
15
Patent #:
Issue Dt:
07/03/2007
Application #:
10371800
Filing Dt:
02/20/2003
Publication #:
Pub Dt:
08/28/2003
Title:
METHODS AND APPARATUS FOR FABRICATING CHIP-ON-BOARD MODULES
16
Patent #:
NONE
Issue Dt:
Application #:
10544462
Filing Dt:
02/21/2006
Publication #:
Pub Dt:
09/21/2006
PCT #:
US0403075
Title:
Fixed frequency resonant converter
17
Patent #:
NONE
Issue Dt:
Application #:
10544471
Filing Dt:
06/13/2006
Publication #:
Pub Dt:
12/21/2006
PCT #:
US0403308
Title:
Power factor correction circuit
18
Patent #:
Issue Dt:
05/02/2006
Application #:
29168585
Filing Dt:
10/04/2002
Title:
COVER FOR MEMORY CHIPS ON A CIRCUIT BOARD
Assignor
1
Exec Dt:
03/21/2005
Assignee
1
10560 DR. MARTIN LUTHER KING, JR. STREET NORTH
ST. PETERSBURG, FLORIDA 33716
Correspondence name and address
KEVIN A. BUFORD, ESQ.
1600 TYSONS BOULEVARD
SUITE 700
MCLEAN, VA 22102-4867

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