Patent Assignment Details
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Reel/Frame: | 016817/0093 | |
| Pages: | 2 |
| | Recorded: | 07/25/2005 | | |
Attorney Dkt #: | H6808.0087/P087 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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06/02/2009
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Application #:
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11187862
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Filing Dt:
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07/25/2005
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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INTEGRATION CIRCUIT, DECREMENT CIRCUIT, AND SEMICONDUCTOR DEVICES
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Assignee
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4-1, MARUNOUCHI 2-CHOME |
CHIYODA-KU |
TOKYO, JAPAN |
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Correspondence name and address
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MARK J. THRONSON
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DICKSTEIN SHAPIRO MORIN & OSHINSKY LLP
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2101 L STREET, NW
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WASHINGTON, DC 20037-1526
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