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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:016892/0310   Pages: 5
Recorded: 12/14/2005
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 23
1
Patent #:
7161365
Issue Dt:
01/09/2007
Application #:
10980301
Filing Dt:
11/04/2004
Publication #:
US20060103369
Pub Dt:
05/18/2006
Title:
APPARATUS AND METHOD FOR MAKING GROUND CONNECTION
2
Patent #:
7365402
Issue Dt:
04/29/2008
Application #:
11031784
Filing Dt:
01/06/2005
Publication #:
US20060145250
Pub Dt:
07/06/2006
Title:
LDMOS TRANSISTOR
3
Patent #:
NONE
Issue Dt:
Application #:
11203338
Filing Dt:
08/12/2005
Publication #:
US20070038804
Pub Dt:
02/15/2007
Title:
TESTMODE AND TEST METHOD FOR INCREASED STRESS DUTY CYCLES DURING BURN IN
4
Patent #:
7372725
Issue Dt:
05/13/2008
Application #:
11204201
Filing Dt:
08/15/2005
Publication #:
US20070047296
Pub Dt:
03/01/2007
Title:
INTEGRATED CIRCUIT HAVING RESISTIVE MEMORY
5
Patent #:
NONE
Issue Dt:
Application #:
11235575
Filing Dt:
09/26/2005
Publication #:
US20070069309
Pub Dt:
03/29/2007
Title:
Buried well for semiconductor devices
6
Patent #:
7313033
Issue Dt:
12/25/2007
Application #:
11236933
Filing Dt:
09/28/2005
Publication #:
US20070070683
Pub Dt:
03/29/2007
Title:
RANDOM ACCESS MEMORY INCLUDING FIRST AND SECOND VOLTAGE SOURCES
7
Patent #:
NONE
Issue Dt:
Application #:
11247335
Filing Dt:
10/11/2005
Publication #:
US20070081366
Pub Dt:
04/12/2007
Title:
Capacitive coupling assisted voltage switching
8
Patent #:
NONE
Issue Dt:
Application #:
11247538
Filing Dt:
10/11/2005
Publication #:
US20070080731
Pub Dt:
04/12/2007
Title:
Duty cycle corrector
9
Patent #:
7330391
Issue Dt:
02/12/2008
Application #:
11251678
Filing Dt:
10/17/2005
Publication #:
US20070086258
Pub Dt:
04/19/2007
Title:
MEMORY HAVING DIRECTED AUTO-REFRESH
10
Patent #:
NONE
Issue Dt:
Application #:
11252041
Filing Dt:
10/17/2005
Publication #:
US20070086261
Pub Dt:
04/19/2007
Title:
Directed auto-refresh for a dynamic random access memory
11
Patent #:
NONE
Issue Dt:
Application #:
11252435
Filing Dt:
10/18/2005
Publication #:
US20070088993
Pub Dt:
04/19/2007
Title:
Memory tester having master/slave configuration
12
Patent #:
NONE
Issue Dt:
Application #:
11257276
Filing Dt:
10/24/2005
Publication #:
US20070092810
Pub Dt:
04/26/2007
Title:
Mask-less method of forming aligned semiconductor wafer features
13
Patent #:
7358683
Issue Dt:
04/15/2008
Application #:
11257814
Filing Dt:
10/25/2005
Publication #:
US20070090766
Pub Dt:
04/26/2007
Title:
AUTOMATIC PWM CONTROLLED DRIVER CIRCUIT AND METHOD
14
Patent #:
7471569
Issue Dt:
12/30/2008
Application #:
11259318
Filing Dt:
10/26/2005
Publication #:
US20060285412
Pub Dt:
12/21/2006
Title:
MEMORY HAVING PARITY ERROR CORRECTION
15
Patent #:
7417245
Issue Dt:
08/26/2008
Application #:
11265372
Filing Dt:
11/02/2005
Publication #:
US20070096162
Pub Dt:
05/03/2007
Title:
PHASE CHANGE MEMORY HAVING MULTILAYER THERMAL INSULATION
16
Patent #:
7795615
Issue Dt:
09/14/2010
Application #:
11268854
Filing Dt:
11/08/2005
Publication #:
US20070102787
Pub Dt:
05/10/2007
Title:
CAPACITOR INTEGRATED IN A STRUCTURE SURROUNDING A DIE
17
Patent #:
7399690
Issue Dt:
07/15/2008
Application #:
11268924
Filing Dt:
11/08/2005
Publication #:
US20070102775
Pub Dt:
05/10/2007
Title:
METHODS OF FABRICATING SEMICONDUCTOR DEVICES AND STRUCTURES THEREOF
18
Patent #:
7366047
Issue Dt:
04/29/2008
Application #:
11270178
Filing Dt:
11/09/2005
Publication #:
US20070104005
Pub Dt:
05/10/2007
Title:
METHOD AND APPARATUS FOR REDUCING STANDBY CURRENT IN A DYNAMIC RANDOM ACCESS MEMORY DURING SELF REFRESH
19
Patent #:
7268080
Issue Dt:
09/11/2007
Application #:
11270400
Filing Dt:
11/09/2005
Publication #:
US20070102397
Pub Dt:
05/10/2007
Title:
METHOD FOR PRINTING CONTACTS ON A SUBSTRATE
20
Patent #:
7457170
Issue Dt:
11/25/2008
Application #:
11273058
Filing Dt:
11/14/2005
Publication #:
US20070109887
Pub Dt:
05/17/2007
Title:
MEMORY DEVICE THAT PROVIDES TEST RESULTS TO MULTIPLE OUTPUT PADS
21
Patent #:
NONE
Issue Dt:
Application #:
11273059
Filing Dt:
11/14/2005
Publication #:
US20070109888
Pub Dt:
05/17/2007
Title:
Integrated circuit with test circuit
22
Patent #:
7201634
Issue Dt:
04/10/2007
Application #:
11273134
Filing Dt:
11/14/2005
Title:
POLISHING METHODS AND APPARATUS
23
Patent #:
7462538
Issue Dt:
12/09/2008
Application #:
11273747
Filing Dt:
11/15/2005
Publication #:
US20070111448
Pub Dt:
05/17/2007
Title:
METHODS OF MANUFACTURING MULTIPLE GATE CMOS TRANSISTORS HAVING DIFFERENT GATE DIELECTRIC MATERIALS
Assignor
1
INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Exec Dt:
12/14/2005
Assignee
1
INFINEON TECHNOLOGIES AG
ST.-MARTIN-STR. 53
MUNICH, GERMANY 81669
Correspondence name and address
HEATHER ROWLAND
3000 CENTREGREEN WAY
CARY, NC 27513

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