Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 016952/0669 | |
| Pages: | 5 |
| | Recorded: | 08/30/2005 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11215521
|
Filing Dt:
|
08/30/2005
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
|
Title:
|
INTEGRATION PROCESSES FOR FABRICATING A CONDUCTIVE METAL OXIDE GATE FERROELECTRIC MEMORY TRANSISTOR
|
|
|
Assignee
|
|
|
|
|
| 5750 N.W. PACIFIC RIM BLVD. |
| CAMAS, WASHINGTON 98607 |
|
|
Correspondence name and address
|
| |
ROBERT D. VARITZ
|
| |
4915 S.E. 33RD PLACE
|
| |
PORTLAND, OR 97202
|
Search Results as of:
04/27/2024 11:00 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
