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Patent Assignment Details
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Reel/Frame:016961/0585   Pages: 5
Recorded: 09/01/2005
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
05/26/2009
Application #:
11219079
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
TRANSISTOR GATE FORMING METHODS AND INTEGRATED CIRCUITS
Assignors
1
Exec Dt:
08/29/2005
2
Exec Dt:
08/29/2005
Assignee
1
8000 SOUTH FEDERAL WAY
BOISE, IDAHO 83716
Correspondence name and address
JAMES E. LAKE
WELLS ST. JOHN P.S.
601 WEST FIRST AVENUE, SUITE 1300
SPOKANE, WA 99201

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