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Patent Assignment Details
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Reel/Frame:016998/0580   Pages: 3
Recorded: 09/16/2005
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
11154645
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
10/12/2006
Title:
Semiconductor substrate with occurrence of slip suppressed and method of manufacturing the same
Assignor
1
Exec Dt:
06/24/2005
Assignee
1
1-1, SHIBAURA 1-CHOME, MINATO-KU
TOKYO 105-8001, JAPAN
Correspondence name and address
MR. ERNEST F. CHAPMAN
FINNEGAN, HENDERSON, FARABOW ETAL.
901 NEW YORK AVENUE, NW
WASHINGTON, D.C. 20001-4413

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