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Total properties:
11
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Patent #:
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Issue Dt:
|
07/08/2008
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Application #:
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11196369
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Filing Dt:
|
08/03/2005
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Publication #:
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Pub Dt:
|
02/08/2007
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Title:
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TECHNIQUE TO SUPPRESS LEAKAGE CURRENT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11219368
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Filing Dt:
|
09/02/2005
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Publication #:
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Pub Dt:
|
03/08/2007
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Title:
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Transistors and methods of manufacture thereof
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Patent #:
|
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Issue Dt:
|
10/07/2008
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Application #:
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11251683
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Filing Dt:
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10/17/2005
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Publication #:
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Pub Dt:
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04/19/2007
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Title:
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DIRECTED AUTO-REFRESH FOR A DYNAMIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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11253727
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Filing Dt:
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10/20/2005
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Publication #:
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Pub Dt:
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04/26/2007
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Title:
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SENSE AMPLIFIER ORGANIZATION FOR TWIN CELL MEMORY DEVICES
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11260346
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Filing Dt:
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10/27/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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INTEGRATED CIRCUIT HAVING AN INSULATED MEMORY
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Patent #:
|
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Issue Dt:
|
07/05/2011
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Application #:
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11265377
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Filing Dt:
|
11/02/2005
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
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Title:
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PHASE CHANGE MEMORY CELL INCLUDING MULTIPLE PHASE CHANGE MATERIAL PORTIONS
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Patent #:
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Issue Dt:
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02/24/2009
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Application #:
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11300050
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Filing Dt:
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12/14/2005
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Publication #:
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Pub Dt:
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06/14/2007
| | | | |
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Title:
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SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE THEREOF
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|
|
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Patent #:
|
|
Issue Dt:
|
08/06/2013
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Application #:
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11312878
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Filing Dt:
|
12/20/2005
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|
Publication #:
|
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Pub Dt:
|
06/21/2007
| | | | |
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Title:
|
METHODS OF FABRICATING ISOLATION REGIONS OF SEMICONDUCTOR DEVICES AND STRUCTURES THEREOF
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|
|
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Patent #:
|
|
Issue Dt:
|
11/25/2008
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Application #:
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11314605
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Filing Dt:
|
12/21/2005
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Publication #:
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Pub Dt:
|
06/21/2007
| | | | |
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Title:
|
RANDOM ACCESS MEMORY INCLUDING CIRCUIT TO COMPRESS COMPARISON RESULTS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/10/2013
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Application #:
|
11317737
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Filing Dt:
|
12/23/2005
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|
Publication #:
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|
Pub Dt:
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06/28/2007
| | | | |
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Title:
|
MIXED ORIENTATION SEMICONDUCTOR DEVICE AND METHOD
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|
|
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Patent #:
|
|
Issue Dt:
|
07/29/2008
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Application #:
|
11320266
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Filing Dt:
|
12/28/2005
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|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
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Title:
|
EDGE PAD ARCHITECTURE FOR SEMICONDUCTOR MEMORY
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|
