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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:017332/0527   Pages: 5
Recorded: 03/20/2006
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 13
1
Patent #:
Issue Dt:
01/23/2001
Application #:
09208542
Filing Dt:
12/09/1998
Title:
LOW TEMPERATURE CVD PROCESSES FOR PREPARING FERROELECTRIC FILMS USING BI AMIDES
2
Patent #:
Issue Dt:
01/30/2001
Application #:
09208543
Filing Dt:
12/09/1998
Title:
LOW TEMPERATURE CVD PROCESSES FOR PREPARING FERROELECTRIC FILMS USING BI CARBOXYLATES
3
Patent #:
Issue Dt:
07/25/2006
Application #:
10878156
Filing Dt:
06/28/2004
Publication #:
Pub Dt:
12/29/2005
Title:
TECHNIQUES FOR REDUCING NEEL COUPLING IN TOGGLE SWITCHING SEMICONDUCTOR DEVICES
4
Patent #:
Issue Dt:
05/13/2008
Application #:
11189615
Filing Dt:
07/26/2005
Publication #:
Pub Dt:
02/01/2007
Title:
OUTPUT MATCH TRANSISTOR
5
Patent #:
Issue Dt:
11/27/2012
Application #:
11315069
Filing Dt:
12/22/2005
Publication #:
Pub Dt:
06/28/2007
Title:
SILICON-ON-INSULATOR CHIP HAVING MULTIPLE CRYSTAL ORIENTATIONS
6
Patent #:
NONE
Issue Dt:
Application #:
11350191
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
08/09/2007
Title:
Memory having nanotube transistor access device
7
Patent #:
Issue Dt:
04/06/2010
Application #:
11352047
Filing Dt:
02/10/2006
Publication #:
Pub Dt:
08/16/2007
Title:
MINIMIZING LOW-K DIELECTRIC DAMAGE DURING PLASMA PROCESSING
8
Patent #:
NONE
Issue Dt:
Application #:
11352565
Filing Dt:
02/13/2006
Publication #:
Pub Dt:
08/16/2007
Title:
Method for fabricating a semiconductor device with a high-K dielectric
9
Patent #:
NONE
Issue Dt:
Application #:
11354430
Filing Dt:
02/15/2006
Publication #:
Pub Dt:
08/16/2007
Title:
Dynamic memory
10
Patent #:
Issue Dt:
03/16/2010
Application #:
11354616
Filing Dt:
02/15/2006
Publication #:
Pub Dt:
08/16/2007
Title:
STRAINED SEMICONDUCTOR DEVICE AND METHOD OF MAKING SAME
11
Patent #:
NONE
Issue Dt:
Application #:
11354969
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
08/30/2007
Title:
Verifying individual probe contact using shared tester channels
12
Patent #:
Issue Dt:
09/13/2011
Application #:
11356666
Filing Dt:
02/17/2006
Publication #:
Pub Dt:
08/23/2007
Title:
CMOS DEVICES HAVING STRESS-ALTERING MATERIAL LINING THE ISOLATION TRENCHES AND METHODS OF MANUFACTURING THEREOF
13
Patent #:
Issue Dt:
11/18/2008
Application #:
11358821
Filing Dt:
02/21/2006
Publication #:
Pub Dt:
08/23/2007
Title:
CONTROL SYSTEM FOR A DYNAMIC RANDOM ACCESS MEMORY AND METHOD OF OPERATION THEREOF
Assignor
1
Exec Dt:
03/14/2006
Assignee
1
ST.-MARTIN-STR. 53
MUNICH, GERMANY 81669
Correspondence name and address
HEATHER ROWLAND
3000 CENTREGREEN WAY
CARY, NC 27513

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