Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 017366/0272 | |
| Pages: | 8 |
| | Recorded: | 07/18/2005 | | |
| Attorney Dkt #: | REASGMO |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
10
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Patent #:
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Issue Dt:
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04/30/1991
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Application #:
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07305575
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Filing Dt:
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02/03/1989
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Title:
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FUSIBLE LINK WITH BUILT-IN REDUNDANCY
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Patent #:
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Issue Dt:
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07/02/1991
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Application #:
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07327632
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Filing Dt:
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03/23/1989
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Title:
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FABRICATION OF DEVICES HAVING LATERALLY ISOLATED SEMICONDUCTOR REGIONS
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Patent #:
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Issue Dt:
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04/02/1991
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Application #:
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07382947
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Filing Dt:
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07/21/1989
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Title:
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MULTIPLE TRENCH SEMICONDUCTOR STRUCTURE METHOD
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Patent #:
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Issue Dt:
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02/19/1991
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Application #:
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07431420
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Filing Dt:
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11/03/1989
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Title:
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METHOD OF FABRICATING SEMICONDUCTOR DEVICES HAVING DEEP AND SHALLOW INSOLATION STRUCTURES
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Patent #:
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Issue Dt:
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04/28/1992
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Application #:
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07559460
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Filing Dt:
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07/27/1990
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Title:
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METHOD OF FORMING PLANAR ISOLATION REGIONS
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Patent #:
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Issue Dt:
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06/25/1991
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Application #:
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07632564
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Filing Dt:
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12/24/1990
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Title:
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SEMICONDUCTOR DEVICE ELECTRODE METHOD
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Patent #:
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Issue Dt:
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03/14/1995
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Application #:
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07801282
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Filing Dt:
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12/02/1991
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Title:
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LATERAL BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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05/23/1995
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Application #:
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08067449
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Filing Dt:
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05/25/1993
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Title:
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LEADING EDGE BLANKING CIRCUIT
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Patent #:
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Issue Dt:
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01/23/1996
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Application #:
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08342476
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Filing Dt:
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11/21/1994
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Title:
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METHOD FOR FORMING A LATERAL BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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04/30/1996
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Application #:
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08347522
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Filing Dt:
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11/30/1994
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Title:
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SEMICONDUCTOR DEVICE HAVING AN EMITTER TERMINAL SEPARATED FROM A BASE TERMINAL BY A COMPOSITE NITRIDE/OXIDE LAYER
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Assignee
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| 5005 EAST MCDOWELL ROAD |
| PHOENIX, ARIZONA 85008 |
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Correspondence name and address
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SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
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PATENT ADMINISTRATION - A700
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P.O. BOX 62890
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PHOENIX, ARIZONA 85082-2890
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