USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	017479/0018			Pages:	5
		Recorded:	04/17/2006
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 11

Patent #:	7256148	Issue Dt:	08/14/2007	Application #:	10908441	Filing Dt:	05/12/2005
Publication #:	US20060258177	Pub Dt:	11/16/2006
Title:	METHOD FOR TREATING A WAFER EDGE

Patent #:	7096127	Issue Dt:	08/22/2006	Application #:	10964102	Filing Dt:	10/13/2004
Publication #:	US20060080046	Pub Dt:	04/13/2006
Title:	MEASURING FLARE IN SEMICONDUCTOR LITHOGRAPHY

Patent #:	7436290	Issue Dt:	10/14/2008	Application #:	11204692	Filing Dt:	08/16/2005
Publication #:	US20070040659	Pub Dt:	02/22/2007
Title:	SENSOR DISCRIMINATION APPARATUS, SYSTEM, AND METHOD

Patent #:	NONE	Issue Dt:		Application #:	11300147	Filing Dt:	12/14/2005
Publication #:	US20070134861	Pub Dt:	06/14/2007
Title:	Semiconductor devices and methods of manufacture thereof

Patent #:	NONE	Issue Dt:		Application #:	11343052	Filing Dt:	01/30/2006
Publication #:	US20070178611	Pub Dt:	08/02/2007
Title:	Semiconductor wafer having measurement area feature for determining dielectric layer thickness

Patent #:	7813289	Issue Dt:	10/12/2010	Application #:	11346064	Filing Dt:	02/02/2006
Publication #:	US20070180281	Pub Dt:	08/02/2007
Title:	ELECTRICAL IDLE DETECTION CIRCUIT INCLUDING INPUT SIGNAL RECTIFIER

Patent #:	7365025	Issue Dt:	04/29/2008	Application #:	11348428	Filing Dt:	02/06/2006
Publication #:	US20070184649	Pub Dt:	08/09/2007
Title:	METHODS OF FORMING DUAL-DAMASCENE INTERCONNECT STRUCTURES ON SEMICONDUCTOR SUBSTRATES USING MULTIPLE PLANARIZATION LAYERS HAVING DIFFERENT POROSITY CHARACTERISTICS

Patent #:	7679130	Issue Dt:	03/16/2010	Application #:	11367247	Filing Dt:	03/03/2006
Publication #:	US20060267134	Pub Dt:	11/30/2006
Title:	DEEP TRENCH ISOLATION STRUCTURES AND METHODS OF FORMATION THEREOF

Patent #:	7362633	Issue Dt:	04/22/2008	Application #:	11385340	Filing Dt:	03/21/2006
Publication #:	US20070223293	Pub Dt:	09/27/2007
Title:	PARALLEL READ FOR FRONT END COMPRESSION MODE

Patent #:	NONE	Issue Dt:		Application #:	11385539	Filing Dt:	03/21/2006
Publication #:	US20070226553	Pub Dt:	09/27/2007
Title:	Multiple banks read and data compression for back end test

Patent #:	NONE	Issue Dt:		Application #:	11390696	Filing Dt:	03/28/2006
Publication #:	US20070239305	Pub Dt:	10/11/2007
Title:	Process control systems and methods

Assignor

Exec Dt:

04/17/2006

Assignee

ST.-MARTIN-STR. 53

MUNICH, GERMANY 81669

Correspondence name and address
	HEATHER ROWLAND
	3000 CENTREGREEN WAY
	CARY, NC 27513

Search Results as of: 05/08/2024 11:50 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6