Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 017509/0167 | |
| Pages: | 3 |
| | Recorded: | 04/19/2006 | | |
Attorney Dkt #: | 1448.1100 |
Conveyance: | CORRECTED COVER SHEET TO CORRECT ASSIGNEE NAME AND ADDRESS, PREVIOUSLY RECORDED AT REEL/FRAME 017258/0621 (ASSIGNMENT OF ASSIGNOR'S INTEREST) |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11214843
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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Method and apparatus for evaluating coverage of circuit, and computer product
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Assignee
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1-1, KAMIKODANAKA 4-CHOME |
NAKAHARA-KU, KAWASAKI-SHI |
KANAGAWA 211-8588, JAPAN |
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Correspondence name and address
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STAAS & HALSEY LLP
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ATTENTION: H.J. STAAS
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1201 NEW YORK AVENUE, N.W.
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7TH FLOOR
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WASHINGTON, DC 20005
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