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Reel/Frame:017544/0769   Pages: 25
Recorded: 04/28/2006
Attorney Dkt #:SDK000.000US
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 267
Page 1 of 3
Pages: 1 2 3
1
Patent #:
Issue Dt:
03/07/2000
Application #:
09192883
Filing Dt:
11/16/1998
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
2
Patent #:
Issue Dt:
02/06/2001
Application #:
09469658
Filing Dt:
12/22/1999
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATIE MEMORY AND METHOD OF FABRICATION
3
Patent #:
Issue Dt:
04/08/2003
Application #:
09638334
Filing Dt:
08/14/2000
Title:
MODULAR MEMORY DEVICE
4
Patent #:
Issue Dt:
07/23/2002
Application #:
09638427
Filing Dt:
08/14/2000
Title:
WRITE-ONCE MEMORY ARRAY CONTROLLER, SYSTEM, AND METHOD
5
Patent #:
Issue Dt:
12/02/2003
Application #:
09638439
Filing Dt:
08/14/2000
Title:
METHOD FOR DELETING STORED DIGITAL DATA FROM WRITE-ONCE MEMORY DEVICE
6
Patent #:
Issue Dt:
06/17/2003
Application #:
09639577
Filing Dt:
08/14/2000
Title:
MULTIGATE SEMICONDUCTOR DEVICE WITH VERTICAL CHANNEL CURRENT AND METHOD OF FABRICATION
7
Patent #:
Issue Dt:
09/23/2003
Application #:
09639750
Filing Dt:
08/14/2000
Title:
THERMAL PROCESSING FOR THREE DIMENSIONAL CIRCUITS
8
Patent #:
Issue Dt:
02/26/2002
Application #:
09714440
Filing Dt:
11/15/2000
Title:
Vertically stacked field programmable nonvolatile memory and method of fabrication
9
Patent #:
Issue Dt:
06/24/2003
Application #:
09727229
Filing Dt:
11/30/2000
Publication #:
Pub Dt:
05/30/2002
Title:
METHOD FOR STORING DIGITAL INFORMATION IN WRITE-ONCE MEMORY ARRAY
10
Patent #:
Issue Dt:
04/01/2003
Application #:
09746083
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
01/02/2003
Title:
FORMATION OF ANTIFUSE STRUCTURE IN A THREE DIMENSIONAL MEMORY
11
Patent #:
Issue Dt:
09/30/2003
Application #:
09746204
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
06/27/2002
Title:
PATTERNING THREE DIMENSIONAL STRUCTURES
12
Patent #:
Issue Dt:
12/16/2003
Application #:
09746341
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
06/27/2002
Title:
CONTACT AND VIA STRUCTURE AND METHOD OF FABRICATION
13
Patent #:
Issue Dt:
11/26/2002
Application #:
09746469
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
06/27/2002
Title:
METHOD OF FORMING NONVOLATILE MEMORY DEVICE UTILIZING A HARD MASK
14
Patent #:
Issue Dt:
07/08/2003
Application #:
09747574
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
06/27/2002
Title:
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD FOR STORING DATA BITS AND ECC BITS THEREIN
15
Patent #:
NONE
Issue Dt:
Application #:
09748589
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
06/26/2003
Title:
Memory devices and methods for use therewith
16
Patent #:
Issue Dt:
12/09/2003
Application #:
09748649
Filing Dt:
12/22/2000
Title:
PARTIAL SELECTION OF PASSIVE ELEMENT MEMORY CELL SUB-ARRAYS FOR WRITE OPERATION
17
Patent #:
Issue Dt:
02/25/2003
Application #:
09748815
Filing Dt:
12/22/2000
Title:
CHARGE PUMP CIRCUIT
18
Patent #:
Issue Dt:
05/07/2002
Application #:
09748816
Filing Dt:
12/22/2000
Title:
INTEGRATED CIRCUIT STRUCTURE INCLUDING THREE-DIMENSIONAL MEMORY ARRAY
19
Patent #:
NONE
Issue Dt:
Application #:
09775745
Filing Dt:
02/02/2001
Publication #:
Pub Dt:
08/08/2002
Title:
Solid-state memory device storing program code and methods for use therewith
20
Patent #:
Issue Dt:
11/26/2002
Application #:
09775761
Filing Dt:
02/02/2001
Publication #:
Pub Dt:
08/08/2002
Title:
METHOD OF GENERATING INTEGRATED CIRCUIT FEATURE LAYOUT FOR IMPROVED CHEMICAL MECHANICAL POLISHING
21
Patent #:
Issue Dt:
08/17/2004
Application #:
09775939
Filing Dt:
02/02/2001
Publication #:
Pub Dt:
08/08/2002
Title:
MEMORY DEVICE AND METHOD FOR READING DATA STORED IN A PORTION OF A MEMORY DEVICE UNREADABLE BY A FILE SYSTEM OF A HOST DEVICE
22
Patent #:
Issue Dt:
06/18/2002
Application #:
09775956
Filing Dt:
02/02/2001
Title:
Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
23
Patent #:
Issue Dt:
11/18/2003
Application #:
09776000
Filing Dt:
02/02/2001
Title:
STRUCTURE AND METHOD FOR WAFER COMPRISING DIELECTRIC AND SEMICONDUCTOR
24
Patent #:
NONE
Issue Dt:
Application #:
09776009
Filing Dt:
02/02/2001
Publication #:
Pub Dt:
08/08/2002
Title:
Wafer surface that facilitates particle removal
25
Patent #:
Issue Dt:
04/01/2008
Application #:
09788864
Filing Dt:
02/20/2001
Publication #:
Pub Dt:
08/22/2002
Title:
MEMORY CARD WITH ENHANCED TESTABILITY AND METHODS OF MAKING AND USING THE SAME
26
Patent #:
Issue Dt:
11/26/2002
Application #:
09809878
Filing Dt:
03/16/2001
Publication #:
Pub Dt:
09/19/2002
Title:
MULTI-STAGE CHARGE PUMP
27
Patent #:
Issue Dt:
02/04/2003
Application #:
09809884
Filing Dt:
03/16/2001
Publication #:
Pub Dt:
09/19/2002
Title:
INTEGRATED CIRCUIT CURRENT SOURCE WITH SWITCHED CAPACITOR FEEDBACK
28
Patent #:
Issue Dt:
07/16/2002
Application #:
09814727
Filing Dt:
03/21/2001
Publication #:
Pub Dt:
07/11/2002
Title:
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD OF FABRICATION
29
Patent #:
Issue Dt:
09/09/2008
Application #:
09823489
Filing Dt:
03/30/2001
Publication #:
Pub Dt:
10/03/2002
Title:
METHOD FOR FIELD-PROGRAMMING A SOLID-STATE MEMORY DEVICE WITH A DIGITAL MEDIA FILE
30
Patent #:
Issue Dt:
12/31/2002
Application #:
09823503
Filing Dt:
03/30/2001
Publication #:
Pub Dt:
01/16/2003
Title:
HIGH-VOLTAGE TRANSISTOR AND FABRICATION PROCESS
31
Patent #:
Issue Dt:
10/21/2003
Application #:
09859282
Filing Dt:
05/17/2001
Title:
METHOD OF PREVENTING AUTODOPING
32
Patent #:
Issue Dt:
02/21/2006
Application #:
09877719
Filing Dt:
06/08/2001
Title:
MEMORY DEVICE AND METHOD FOR STORING AND READING A FILE SYSTEM STRUCTURE IN A WRITE-ONCE MEMORY ARRAY
33
Patent #:
Issue Dt:
02/07/2006
Application #:
09877720
Filing Dt:
06/08/2001
Title:
MEMORY DEVICE AND METHOD FOR STORING AND READING DATA IN A WRITE-ONCE MEMORY ARRAY
34
Patent #:
Issue Dt:
06/13/2006
Application #:
09878138
Filing Dt:
06/08/2001
Title:
METHOD FOR READING DATA IN A WRITE-ONCE MEMORY DEVICE USING A WRITE-MANY FILE SYSTEM
35
Patent #:
Issue Dt:
02/04/2003
Application #:
09895960
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
09/26/2002
Title:
METHOD AND SYSTEM FOR INCREASING PROGRAMMING BANDWIDTH IN A NON-VOLATILE MEMORY DEVICE
36
Patent #:
Issue Dt:
02/13/2007
Application #:
09896468
Filing Dt:
06/29/2001
Title:
CURRENT SENSING METHOD AND APPARATUS PARTICULARLY USEFUL FOR A MEMORY ARRAY OF CELLS HAVING DIODE-LIKE CHARACTERISTICS
37
Patent #:
Issue Dt:
05/20/2003
Application #:
09896814
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
09/26/2002
Title:
MEMORY DEVICE WITH ROW AND COLUMN DECODER CIRCUITS ARRANGED IN A CHECKERBOARD PATTERN UNDER A PLURALITY OF MEMORY ARRAYS
38
Patent #:
Issue Dt:
06/03/2003
Application #:
09896815
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
09/26/2002
Title:
MEMORY DEVICE AND METHOD FOR SENSING WHILE PROGRAMMING A NON-VOLATILE MEMORY CELL
39
Patent #:
Issue Dt:
02/18/2003
Application #:
09897704
Filing Dt:
06/29/2001
Title:
MEMORY ARRAY INCORPORATING NOISE DETECTION LINE
40
Patent #:
Issue Dt:
10/07/2003
Application #:
09897705
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
03/20/2003
Title:
THREE-DIMENSIONAL MEMORY ARRAY INCORPORATING SERIAL CHAIN DIODE STACK
41
Patent #:
Issue Dt:
09/09/2003
Application #:
09897771
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
09/26/2002
Title:
METHOD AND APPARATUS FOR BIASING SELECTED AND UNSELECTED ARRAY LINES WHEN WRITING A MEMORY ARRAY
42
Patent #:
Issue Dt:
01/07/2003
Application #:
09897784
Filing Dt:
06/29/2001
Title:
METHOD AND APPARATUS FOR DISCHARGING MEMORY ARRAY LINES
43
Patent #:
Issue Dt:
04/08/2003
Application #:
09897785
Filing Dt:
06/29/2001
Title:
METHOD AND APPARATUS FOR WRITING MEMORY ARRAYS USING EXTERNAL SOURCE OF HIGH PROGRAMMING VOLTAGE
44
Patent #:
NONE
Issue Dt:
Application #:
09918307
Filing Dt:
07/30/2001
Publication #:
Pub Dt:
02/06/2003
Title:
Anti-fuse memory cell with asymmetric breakdown voltage
45
Patent #:
Issue Dt:
10/19/2010
Application #:
09918853
Filing Dt:
07/30/2001
Publication #:
Pub Dt:
01/30/2003
Title:
PROCESS FOR FABRICATING A DIELECTRIC FILM USING PLASMA OXIDATION
46
Patent #:
Issue Dt:
05/03/2005
Application #:
09927642
Filing Dt:
08/13/2001
Publication #:
Pub Dt:
12/27/2001
Title:
NONVOLATILE MEMORY ON SOI AND COMPOUND SEMICONDUCTOR SUBSTRATES AND METHOD OF FABRICATION
47
Patent #:
Issue Dt:
04/19/2005
Application #:
09927648
Filing Dt:
08/13/2001
Publication #:
Pub Dt:
03/07/2002
Title:
MONOLITHIC THREE DIMENSIONAL ARRAY OF CHARGE STORAGE DEVICES CONTAINING A PLANARIZED SURFACE
48
Patent #:
Issue Dt:
02/25/2003
Application #:
09928536
Filing Dt:
08/13/2001
Title:
VERTICALLY-STACKED, FIELD-PROGRAMMABLE, NONVOLATILE MEMORY AND METHOD OF FABRICATION
49
Patent #:
Issue Dt:
01/18/2005
Application #:
09928767
Filing Dt:
08/13/2001
Publication #:
Pub Dt:
02/13/2003
Title:
MOLDED MEMORY MODULE AND METHOD OF MAKING THE MODULE ABSENT A SUBSTRATE SUPPORT
50
Patent #:
Issue Dt:
02/04/2003
Application #:
09928969
Filing Dt:
08/13/2001
Publication #:
Pub Dt:
06/20/2002
Title:
LOW-COST THREE-DIMENSIONAL MEMORY ARRAY
51
Patent #:
Issue Dt:
12/12/2006
Application #:
09928975
Filing Dt:
08/13/2001
Publication #:
Pub Dt:
02/13/2003
Title:
LOW RESISTIVITY TITANIUM SILICIDE ON HEAVILY DOPED SEMICONDUCTOR
52
Patent #:
Issue Dt:
12/03/2002
Application #:
09932701
Filing Dt:
08/17/2001
Title:
DIGITAL MEMORY METHOD AND SYSTEM FOR STORING MULTIPLE BIT DIGITAL DATA
53
Patent #:
Issue Dt:
05/04/2004
Application #:
09935862
Filing Dt:
08/22/2001
Publication #:
Pub Dt:
08/08/2002
Title:
INTEGRATED CIRCUIT FEATURE LAYOUT FOR IMPROVED CHEMICAL MECHANICAL POLISHING
54
Patent #:
Issue Dt:
03/18/2003
Application #:
09939321
Filing Dt:
08/24/2001
Publication #:
Pub Dt:
06/27/2002
Title:
CONTACT AND VIA STRUCTURE AND METHOD OF FABRICATION
55
Patent #:
Issue Dt:
11/19/2002
Application #:
09939431
Filing Dt:
08/24/2001
Publication #:
Pub Dt:
03/07/2002
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
56
Patent #:
Issue Dt:
01/02/2007
Application #:
09939498
Filing Dt:
08/24/2001
Publication #:
Pub Dt:
11/06/2003
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
57
Patent #:
Issue Dt:
04/20/2004
Application #:
09943655
Filing Dt:
08/31/2001
Publication #:
Pub Dt:
03/06/2003
Title:
MEMORY DEVICE AND METHOD FOR SELECTABLE SUB-ARRAY ACTIVATION
58
Patent #:
Issue Dt:
05/11/2004
Application #:
09944613
Filing Dt:
08/31/2001
Publication #:
Pub Dt:
03/06/2003
Title:
MEMORY DEVICE AND METHOD FOR TEMPERATURE-BASED CONTROL OVER WRITE AND/OR READ OPERATIONS
59
Patent #:
Issue Dt:
07/15/2003
Application #:
09961278
Filing Dt:
09/25/2001
Publication #:
Pub Dt:
03/27/2003
Title:
THIN FILM TRANSISTORS WITH VERTICALLY OFFSET DRAIN REGIONS
60
Patent #:
Issue Dt:
02/14/2006
Application #:
09972787
Filing Dt:
10/05/2001
Publication #:
Pub Dt:
04/10/2003
Title:
WRITE-MANY MEMORY DEVICE AND METHOD FOR LIMITING A NUMBER OF WRITES TO THE WRITE-MANY MEMORY DEVICE
61
Patent #:
Issue Dt:
01/11/2005
Application #:
09983988
Filing Dt:
10/26/2001
Publication #:
Pub Dt:
02/13/2003
Title:
TFT MASK ROM AND METHOD FOR MAKING SAME
62
Patent #:
Issue Dt:
07/27/2004
Application #:
09990894
Filing Dt:
11/16/2001
Title:
INTEGRATED CIRCUIT MEMORY ARRAY WITH FAST TEST MODE UTILIZING MULTIPLE WORD LINE SELECTION AND METHOD THEREFOR
63
Patent #:
Issue Dt:
05/03/2005
Application #:
09990901
Filing Dt:
11/16/2001
Title:
INTEGRATED CIRCUIT INCORPORATING DUAL ORGANIZATION MEMORY ARRAY
64
Patent #:
Issue Dt:
02/04/2003
Application #:
10002268
Filing Dt:
11/15/2001
Title:
MEMORY ARRAY ORGANIZATION AND RELATED TEST METHOD PARTICULARLY WELL SUITED FOR INTEGRATED CIRCUITS HAVING WRITE-ONCE MEMORY ARRAYS
65
Patent #:
Issue Dt:
11/19/2002
Application #:
10002856
Filing Dt:
11/15/2001
Title:
CHARGE PUMP CIRCUIT
66
Patent #:
Issue Dt:
09/23/2003
Application #:
10010643
Filing Dt:
11/05/2001
Publication #:
Pub Dt:
05/08/2003
Title:
THREE-DIMENSIONAL, MASK-PROGRAMMED READ ONLY MEMORY
67
Patent #:
Issue Dt:
05/31/2005
Application #:
10023200
Filing Dt:
12/14/2001
Publication #:
Pub Dt:
06/19/2003
Title:
METHOD FOR ALTERING A WORD STORED IN A WRITE-ONCE MEMORY DEVICE
68
Patent #:
Issue Dt:
05/13/2003
Application #:
10023466
Filing Dt:
12/14/2001
Title:
MEMORY DEVICE AND METHOD FOR DYNAMIC BIT INVERSION
69
Patent #:
Issue Dt:
05/17/2005
Application #:
10023468
Filing Dt:
12/14/2001
Title:
METHOD FOR MAKING A WRITE-ONCE MEMORY DEVICE READ COMPATIBLE WITH A WRITE-MANY FILE SYSTEM
70
Patent #:
Issue Dt:
05/15/2007
Application #:
10024646
Filing Dt:
12/14/2001
Publication #:
Pub Dt:
06/19/2003
Title:
MEMORY DEVICE AND METHOD FOR REDUNDANCY/SELF-REPAIR
71
Patent #:
Issue Dt:
08/09/2005
Application #:
10024647
Filing Dt:
12/14/2001
Publication #:
Pub Dt:
06/19/2003
Title:
MEMORY DEVICE AND METHOD FOR STORING BITS IN NON-ADJACENT STORAGE LOCATIONS IN A MEMORY ARRAY
72
Patent #:
Issue Dt:
03/09/2004
Application #:
10027466
Filing Dt:
12/20/2001
Publication #:
Pub Dt:
02/06/2003
Title:
ANTI-FUSE MEMORY CELL WITH ASYMMETRIC BREAKDOWN VOLTAGE
73
Patent #:
Issue Dt:
10/28/2003
Application #:
10036291
Filing Dt:
11/07/2001
Publication #:
Pub Dt:
05/08/2003
Title:
DUMMY WAFERS AND METHODS FOR MAKING THE SAME
74
Patent #:
Issue Dt:
03/28/2006
Application #:
10045653
Filing Dt:
11/07/2001
Publication #:
Pub Dt:
05/08/2003
Title:
METAL STRUCTURES FOR INTEGRATED CIRCUITS AND METHODS FOR MAKING THE SAME
75
Patent #:
Issue Dt:
05/24/2005
Application #:
10066376
Filing Dt:
02/05/2002
Publication #:
Pub Dt:
10/03/2002
Title:
TWO MASK FLOATING GATE EEPROM AND METHOD OF MAKING
76
Patent #:
Issue Dt:
11/18/2003
Application #:
10068195
Filing Dt:
02/04/2002
Publication #:
Pub Dt:
08/07/2003
Title:
METHOD FOR FABRICATING AND IDENTIFYING INTEGRATED CIRCUITS AND SELF-IDENTIFYING INTEGRATED CIRCUITS
77
Patent #:
Issue Dt:
05/02/2006
Application #:
10077108
Filing Dt:
02/15/2002
Publication #:
Pub Dt:
09/04/2003
Title:
DIVERSE BAND GAP ENERGY LEVEL SEMICONDUCTOR DEVICE
78
Patent #:
NONE
Issue Dt:
Application #:
10079472
Filing Dt:
02/19/2002
Publication #:
Pub Dt:
08/21/2003
Title:
Gate dielectric structures for integrated circuits and methods for making and using such gate dielectric structures
79
Patent #:
Issue Dt:
05/04/2004
Application #:
10080036
Filing Dt:
02/19/2002
Publication #:
Pub Dt:
08/21/2003
Title:
MEMORY MODULE HAVING INTERCONNECTED AND STACKED INTEGRATED CIRCUITS
80
Patent #:
Issue Dt:
02/08/2005
Application #:
10095962
Filing Dt:
03/13/2002
Publication #:
Pub Dt:
09/18/2003
Title:
SILICIDE-SILICON OXIDE-SEMICONDUCTOR ANTIFUSE DEVICE AND METHOD OF MAKING
81
Patent #:
Issue Dt:
07/27/2004
Application #:
10114451
Filing Dt:
04/01/2002
Publication #:
Pub Dt:
08/08/2002
Title:
FORMATION OF ANTIFUSE STRUCTURE IN A THREE DIMENSIONAL MEMORY
82
Patent #:
Issue Dt:
02/10/2004
Application #:
10128188
Filing Dt:
04/22/2002
Publication #:
Pub Dt:
04/03/2003
Title:
VERTICALLY-STACKED, FIELD-PROGRAMMABLE, NONVOLATILE MEMORY AND METHOD OF FABRICATION
83
Patent #:
Issue Dt:
05/20/2003
Application #:
10144451
Filing Dt:
05/09/2002
Title:
MEMORY DEVICE AND METHOD FOR RELIABLY READING MULTI-BIT DATA FROM A WRITE-MANY MEMORY CELL
84
Patent #:
Issue Dt:
11/25/2003
Application #:
10153999
Filing Dt:
05/22/2002
Publication #:
Pub Dt:
10/03/2002
Title:
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD OF FABRICATION
85
Patent #:
Issue Dt:
05/18/2004
Application #:
10180046
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
01/01/2004
Title:
HIGH DENSITY 3D RAIL STACK ARRAYS
86
Patent #:
Issue Dt:
07/27/2004
Application #:
10184578
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
01/01/2004
Title:
MULTIPLE-MODE MEMORY AND METHOD FOR FORMING SAME
87
Patent #:
NONE
Issue Dt:
Application #:
10185208
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
01/01/2004
Title:
Low-cost, serially-connected, multi-level mask-programmable read-only memory
88
Patent #:
Issue Dt:
10/04/2005
Application #:
10185507
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
01/01/2004
Title:
ELECTRICALLY ISOLATED PILLARS IN ACTIVE DEVICES
89
Patent #:
Issue Dt:
07/25/2006
Application #:
10185508
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
01/01/2004
Title:
THREE-DIMENSIONAL MEMORY
90
Patent #:
Issue Dt:
11/04/2003
Application #:
10185515
Filing Dt:
06/27/2002
Title:
SAME CONDUCTIVITY TYPE HIGHLY-DOPED REGIONS FOR ANTIFUSE MEMORY CELL
91
Patent #:
Issue Dt:
07/20/2004
Application #:
10185588
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
11/07/2002
Title:
INTEGRATED SYSTEMS USING VERTICALLY-STACKED THREE-DIMENSIONAL MEMORY CELLS
92
Patent #:
Issue Dt:
03/23/2004
Application #:
10186356
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
11/14/2002
Title:
THREE-DIMENSIONAL MEMORY CACHE SYSTEM
93
Patent #:
Issue Dt:
08/17/2004
Application #:
10186359
Filing Dt:
06/27/2002
Publication #:
Pub Dt:
01/30/2003
Title:
MEMORY CELL WITH ANTIFUSE LAYER FORMED AT DIODE JUNCTION
94
Patent #:
Issue Dt:
08/24/2004
Application #:
10217182
Filing Dt:
08/12/2002
Publication #:
Pub Dt:
02/12/2004
Title:
DYNAMIC SUB-ARRAY GROUP SELECTION SCHEME
95
Patent #:
Issue Dt:
12/05/2006
Application #:
10247071
Filing Dt:
09/18/2002
Publication #:
Pub Dt:
02/13/2003
Title:
LOW RESISTIVITY TITANIUM SILICIDE ON HEAVILY DOPED SEMICONDUCTOR
96
Patent #:
Issue Dt:
09/05/2006
Application #:
10247073
Filing Dt:
09/18/2002
Publication #:
Pub Dt:
01/30/2003
Title:
HIGH-VOLTAGE TRANSISTOR AND FABRICATION PROCESS
97
Patent #:
Issue Dt:
01/09/2007
Application #:
10251206
Filing Dt:
09/19/2002
Publication #:
Pub Dt:
01/23/2003
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
98
Patent #:
Issue Dt:
02/17/2004
Application #:
10253022
Filing Dt:
09/23/2002
Publication #:
Pub Dt:
01/23/2003
Title:
Methods for permanently preventing modification of a partition or file
99
Patent #:
Issue Dt:
03/17/2009
Application #:
10253024
Filing Dt:
09/24/2002
Publication #:
Pub Dt:
01/30/2003
Title:
CURRENT SENSING METHOD AND APPARATUS PARTICULARLY USEFUL FOR A MEMORY ARRAY OF CELLS HAVING DIODE-LIKE CHARACTERISTICS
100
Patent #:
Issue Dt:
11/16/2004
Application #:
10253048
Filing Dt:
09/23/2002
Publication #:
Pub Dt:
01/30/2003
Title:
METHODS FOR IDENTIFYING MEMORY CELLS STORING REPLACEMENT DATA ON A MEMORY DEVICE
Assignor
1
Exec Dt:
10/20/2005
Assignee
1
140 CASPIAN COURT
SUNNYVALE, CALIFORNIA 94089
Correspondence name and address
BRADFORD L. FRIEDMAN
140 CASPIAN COURT
SUNNYVALE, CA 94089

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