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Reel/Frame:	017544/0769			Pages:	25
		Recorded:	04/28/2006
Attorney Dkt #:	SDK000.000US
Conveyance:	MERGER (SEE DOCUMENT FOR DETAILS).

Total properties: 267
Page 2 of 3
Pages: 1 2 3

Patent #:	6738883	Issue Dt:	05/18/2004	Application #:	10253049	Filing Dt:	09/23/2002
Publication #:	US20030023828	Pub Dt:	01/30/2003
Title:	CONFIGURING FILE STRUCTURES AND FILE SYSTEM STRUCTURES IN A MEMORY DEVICE

Patent #:	6784517	Issue Dt:	08/31/2004	Application #:	10253051	Filing Dt:	09/24/2002
Publication #:	US20030022420	Pub Dt:	01/30/2003
Title:	THREE-DIMENSIONAL MEMORY ARRAY INCORPORATING SERIAL CHAIN DIODE STACK

Patent #:	6754102	Issue Dt:	06/22/2004	Application #:	10253074	Filing Dt:	09/24/2002
Publication #:	US20030027378	Pub Dt:	02/06/2003
Title:	METHOD FOR PROGRAMMING A THREE-DIMENSIONAL MEMORY ARRAY INCORPORATING SERIAL CHAIN DIODE STACK

Patent #:	6937495	Issue Dt:	08/30/2005	Application #:	10253075	Filing Dt:	09/24/2002
Publication #:	US20030026120	Pub Dt:	02/06/2003
Title:	CURRENT SENSING METHOD AND APPARATUS PARTICULARLY USEFUL FOR A MEMORY ARRAY OF CELLS HAVING DIODE-LIKE CHARACTERISTICS

Patent #:	6767816	Issue Dt:	07/27/2004	Application #:	10253076	Filing Dt:	09/24/2002
Publication #:	US20030031067	Pub Dt:	02/13/2003
Title:	METHOD FOR MAKING A THREE-DIMENSIONAL MEMORY ARRAY INCORPORATING SERIAL CHAIN DIODE STACK

Patent #:	6647471	Issue Dt:	11/11/2003	Application #:	10253089	Filing Dt:	09/23/2002
Publication #:	US20030028734	Pub Dt:	02/06/2003
Title:	METHODS FOR OVERWRITING DATA IN A MEMORY DEVICE

Patent #:	6697928	Issue Dt:	02/24/2004	Application #:	10253163	Filing Dt:	09/23/2002
Publication #:	US20030023821	Pub Dt:	01/30/2003
Title:	SYSTEM AND METHOD FOR STORING FIRST AND SECOND FILES IN A MEMORY DEVICE

Patent #:	6651133	Issue Dt:	11/18/2003	Application #:	10253218	Filing Dt:	09/23/2002
Publication #:	US20030028717	Pub Dt:	02/06/2003
Title:	METHOD AND DATA STORAGE DEVICE FOR WRITING A MINIMUM NUMBER OF MEMORY CELLS IN A MEMORY DEVICE

Patent #:	6780711	Issue Dt:	08/24/2004	Application #:	10253354	Filing Dt:	09/23/2002
Publication #:	US20030026121	Pub Dt:	02/06/2003
Title:	VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION

Patent #:	7049678	Issue Dt:	05/23/2006	Application #:	10254123	Filing Dt:	09/25/2002
Publication #:	US20030164492	Pub Dt:	09/04/2003
Title:	DIVERSE BAND GAP ENERGY LEVEL SEMICONDUCTOR DEVICE

Patent #:	6657278	Issue Dt:	12/02/2003	Application #:	10254129	Filing Dt:	09/25/2002
Publication #:	US20030164493	Pub Dt:	09/04/2003
Title:	DIVERSE BAND GAP ENERGY LEVEL SEMICONDUCTOR DEVICE

Patent #:	6686646	Issue Dt:	02/03/2004	Application #:	10254172	Filing Dt:	09/25/2002
Publication #:	US20030155569	Pub Dt:	08/21/2003
Title:	DIVERSE BAND GAP ENERGY LEVEL SEMICONDUCTOR DEVICE

Patent #:	7199418	Issue Dt:	04/03/2007	Application #:	10254326	Filing Dt:	09/25/2002
Publication #:	US20030164494	Pub Dt:	09/04/2003
Title:	DIVERSE BAND GAP ENERGY LEVEL SEMICONDUCTOR DEVICE

Patent #:	6677204	Issue Dt:	01/13/2004	Application #:	10254878	Filing Dt:	09/26/2002
Publication #:	US20030139011	Pub Dt:	07/24/2003
Title:	MULTIGATE SEMICONDUCTOR DEVICE WITH VERTICAL CHANNEL CURRENT AND METHOD OF FABRICATION

Patent #:	7071565	Issue Dt:	07/04/2006	Application #:	10255884	Filing Dt:	09/26/2002
Publication #:	US20030025210	Pub Dt:	02/06/2003
Title:	PATTERNING THREE DIMENSIONAL STRUCTURES

Patent #:	6770939	Issue Dt:	08/03/2004	Application #:	10256116	Filing Dt:	09/26/2002
Publication #:	US20030025176	Pub Dt:	02/06/2003
Title:	THERMAL PROCESSING FOR THREE DIMENSIONAL CIRCUITS

Patent #:	NONE	Issue Dt:		Application #:	10265045	Filing Dt:	10/04/2002
Publication #:	US20030102528	Pub Dt:	06/05/2003
Title:	Wafer surface that facilitates particle removal

Patent #:	6858899	Issue Dt:	02/22/2005	Application #:	10270127	Filing Dt:	10/15/2002
Publication #:	US20040069990	Pub Dt:	04/15/2004
Title:	THIN FILM TRANSISTOR WITH METAL OXIDE LAYER AND METHOD OF MAKING SAME

Patent #:	6710409	Issue Dt:	03/23/2004	Application #:	10270309	Filing Dt:	10/15/2002
Title:	INVERTED STAGGERED THIN FILM TRANSISTOR WITH ETCH STOP LAYER AND METHOD OF MAKING SAME

Patent #:	6815781	Issue Dt:	11/09/2004	Application #:	10270394	Filing Dt:	10/15/2002
Publication #:	US20040036124	Pub Dt:	02/26/2004
Title:	INVERTED STAGGERED THIN FILM TRANSISTOR WITH SALICIDED SOURCE/DRAIN STRUCTURES AND METHOD OF MAKING SAME

Patent #:	6965527	Issue Dt:	11/15/2005	Application #:	10305715	Filing Dt:	11/27/2002
Publication #:	US20040100827	Pub Dt:	05/27/2004
Title:	MULTIBANK MEMORY ON A DIE

Patent #:	6856572	Issue Dt:	02/15/2005	Application #:	10306887	Filing Dt:	11/27/2002
Publication #:	US20030214841	Pub Dt:	11/20/2003
Title:	MULTI-HEADED DECODER STRUCTURE UTILIZING MEMORY ARRAY LINE DRIVER WITH DUAL PURPOSE DRIVER DEVICE

Patent #:	6859410	Issue Dt:	02/22/2005	Application #:	10306888	Filing Dt:	11/27/2002
Publication #:	US20040100852	Pub Dt:	05/27/2004
Title:	TREE DECODER STRUCTURE PARTICULARLY WELL-SUITED TO INTERFACING ARRAY LINES HAVING EXTREMELY SMALL LAYOUT PITCH

Patent #:	6954394	Issue Dt:	10/11/2005	Application #:	10307270	Filing Dt:	11/27/2002
Publication #:	US20040100831	Pub Dt:	05/27/2004
Title:	INTEGRATED CIRCUIT AND METHOD FOR SELECTING A SET OF MEMORY-CELL-LAYER-DEPENDENT OR TEMPERATURE-DEPENDENT OPERATING CONDITIONS

Patent #:	6633509	Issue Dt:	10/14/2003	Application #:	10310225	Filing Dt:	12/05/2002
Publication #:	US20030081489	Pub Dt:	05/01/2003
Title:	PARTIAL SELECTION OF PASSIVE ELEMENT MEMORY CELL SUB-ARRAYS FOR WRITE OPERATIONS

Patent #:	6780683	Issue Dt:	08/24/2004	Application #:	10313763	Filing Dt:	12/06/2002
Publication #:	US20030124802	Pub Dt:	07/03/2003
Title:	VERTICALLY-STACKED, FIELD-PROGRAMMABLE, NONVOLATILE MEMORY AND METHOD OF FABRICATION

Patent #:	6807119	Issue Dt:	10/19/2004	Application #:	10325737	Filing Dt:	12/23/2002
Publication #:	US20040120186	Pub Dt:	06/24/2004
Title:	ARRAY CONTAINING CHARGE STORAGE AND DUMMY TRANSISTORS AND METHOD OF OPERATING THE ARRAY

Patent #:	6849905	Issue Dt:	02/01/2005	Application #:	10325951	Filing Dt:	12/23/2002
Publication #:	US20040119122	Pub Dt:	06/24/2004
Title:	SEMICONDUCTOR DEVICE WITH LOCALIZED CHARGE STORAGE DIELECTRIC AND METHOD OF MAKING SAME

Patent #:	7051251	Issue Dt:	05/23/2006	Application #:	10327680	Filing Dt:	12/20/2002
Publication #:	US20040123064	Pub Dt:	06/24/2004
Title:	METHOD FOR STORING DATA IN A WRITE-ONCE MEMORY ARRAY USING A WRITE-MANY FILE SYSTEM

Patent #:	6960794	Issue Dt:	11/01/2005	Application #:	10334649	Filing Dt:	12/31/2002
Publication #:	US20040124415	Pub Dt:	07/01/2004
Title:	FORMATION OF THIN CHANNELS FOR TFT DEVICES TO ENSURE LOW VARIABILITY OF THRESHOLD VOLTAGES

Patent #:	7505321	Issue Dt:	03/17/2009	Application #:	10335078	Filing Dt:	12/31/2002
Publication #:	US20040125629	Pub Dt:	07/01/2004
Title:	PROGRAMMABLE MEMORY ARRAY STRUCTURE INCORPORATING SERIES-CONNECTED TRANSISTOR STRINGS AND METHODS FOR FABRICATION AND OPERATION OF SAME

Patent #:	7005350	Issue Dt:	02/28/2006	Application #:	10335089	Filing Dt:	12/31/2002
Publication #:	US20040124466	Pub Dt:	07/01/2004
Title:	METHOD FOR FABRICATING PROGRAMMABLE MEMORY ARRAY STRUCTURES INCORPORATING SERIES-CONNECTED TRANSISTOR STRINGS

Patent #:	6867992	Issue Dt:	03/15/2005	Application #:	10342122	Filing Dt:	01/13/2003
Publication #:	US20030151959	Pub Dt:	08/14/2003
Title:	MODULAR MEMORY DEVICE

Patent #:	6713371	Issue Dt:	03/30/2004	Application #:	10391142	Filing Dt:	03/17/2003
Title:	LARGE GRAIN SIZE POLYSILICON FILMS FORMED BY NUCLEI-INDUCED SOLID PHASE CRYSTALLIZATION

Patent #:	6868022	Issue Dt:	03/15/2005	Application #:	10402385	Filing Dt:	03/28/2003
Publication #:	US20040190357	Pub Dt:	09/30/2004
Title:	REDUNDANT MEMORY STRUCTURE USING BAD BIT POINTERS

Patent #:	6822903	Issue Dt:	11/23/2004	Application #:	10403488	Filing Dt:	03/31/2003
Publication #:	US20040190359	Pub Dt:	09/30/2004
Title:	APPARATUS AND METHOD FOR DISTURB-FREE PROGRAMMING OF PASSIVE ELEMENT MEMORY CELLS

Patent #:	7233024	Issue Dt:	06/19/2007	Application #:	10403752	Filing Dt:	03/31/2003
Publication #:	US20040188714	Pub Dt:	09/30/2004
Title:	THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED BIT LINE MEMORY ARRAY

Patent #:	6879505	Issue Dt:	04/12/2005	Application #:	10403844	Filing Dt:	03/31/2003
Publication #:	US20040190360	Pub Dt:	09/30/2004
Title:	WORD LINE ARRANGEMENT HAVING MULTI-LAYER WORD LINE SEGMENTS FOR THREE-DIMENSIONAL MEMORY ARRAY

Patent #:	6735104	Issue Dt:	05/11/2004	Application #:	10440377	Filing Dt:	05/16/2003
Publication #:	US20030202404	Pub Dt:	10/30/2003
Title:	MEMORY DEVICE WITH ROW AND COLUMN DECODER CIRCUITS ARRANGED IN A CHECKBOARD PATTERN UNDER A PLURALITY OF MEMORY ARRAYS

Patent #:	7511352	Issue Dt:	03/31/2009	Application #:	10440882	Filing Dt:	05/19/2003
Publication #:	US20040232509	Pub Dt:	11/25/2004
Title:	RAIL SCHOTTKY DEVICE AND METHOD OF MAKING

Patent #:	6815077	Issue Dt:	11/09/2004	Application #:	10441601	Filing Dt:	05/20/2003
Publication #:	US20040234781	Pub Dt:	11/25/2004
Title:	LOW TEMPERATURE, LOW-RESISTIVITY HEAVILY DOPED P-TYPE POLYSILICON DEPOSITION

Patent #:	7243203	Issue Dt:	07/10/2007	Application #:	10461295	Filing Dt:	06/13/2003
Publication #:	US20040255088	Pub Dt:	12/16/2004
Title:	PIPELINE CIRCUIT FOR LOW LATENCY MEMORY

Patent #:	7023260	Issue Dt:	04/04/2006	Application #:	10610315	Filing Dt:	06/30/2003
Publication #:	US20040263238	Pub Dt:	12/30/2004
Title:	CHARGE PUMP CIRCUIT INCORPORATING CORRESPONDING PARALLEL CHARGE PUMP STAGES AND METHOD THEREFOR

Patent #:	8575719	Issue Dt:	11/05/2013	Application #:	10610804	Filing Dt:	06/30/2003
Publication #:	US20040016991	Pub Dt:	01/29/2004
Title:	SILICON NITRIDE ANTIFUSE FOR USE IN DIODE-ANTIFUSE MEMORY ARRAYS

Patent #:	6956278	Issue Dt:	10/18/2005	Application #:	10611245	Filing Dt:	06/30/2003
Publication #:	US20040262702	Pub Dt:	12/30/2004
Title:	LOW-DENSITY, HIGH-RESISTIVITY TITANIUM NITRIDE LAYER FOR USE AS A CONTACT FOR LOW-LEAKAGE DIELECTRIC LAYERS

Patent #:	7307012	Issue Dt:	12/11/2007	Application #:	10611246	Filing Dt:	06/30/2003
Publication #:	US20040266206	Pub Dt:	12/30/2004
Title:	POST VERTICAL INTERCONNECTS FORMED WITH SILICIDE ETCH STOP AND METHOD OF MAKING

Patent #:	6894936	Issue Dt:	05/17/2005	Application #:	10623266	Filing Dt:	07/18/2003
Publication #:	US20040066671	Pub Dt:	04/08/2004
Title:	MEMORY DEVICE AND METHOD FOR SELECTABLE SUB-ARRAY ACTIVATION

Patent #:	NONE	Issue Dt:		Application #:	10624580	Filing Dt:	07/21/2003
Publication #:	US20040018731	Pub Dt:	01/29/2004
Title:	Method of preventing autodoping

Patent #:	6947305	Issue Dt:	09/20/2005	Application #:	10636036	Filing Dt:	08/06/2003
Publication #:	US20040029357	Pub Dt:	02/12/2004
Title:	METHOD FOR FABRICATING AND IDENTIFYING INTEGRATED CIRCUITS AND SELF-IDENTIFYING INTEGRATED CIRCUITS

Patent #:	6875641	Issue Dt:	04/05/2005	Application #:	10665697	Filing Dt:	09/22/2003
Publication #:	US20040062094	Pub Dt:	04/01/2004
Title:	THREE-DIMENSIONAL MEMORY

Patent #:	7115967	Issue Dt:	10/03/2006	Application #:	10666971	Filing Dt:	09/18/2003
Publication #:	US20050099856	Pub Dt:	05/12/2005
Title:	THREE-DIMENSIONAL MEMORY

Patent #:	7012299	Issue Dt:	03/14/2006	Application #:	10668693	Filing Dt:	09/23/2003
Publication #:	US20050062098	Pub Dt:	03/24/2005
Title:	STORAGE LAYER OPTIMIZATION OF A NONVOLATILE MEMORY DEVICE

Patent #:	7174351	Issue Dt:	02/06/2007	Application #:	10674289	Filing Dt:	09/29/2003
Publication #:	US20040098416	Pub Dt:	05/20/2004
Title:	METHOD FOR DELETING STORED DIGITAL DATA FROM WRITE-ONCE MEMORY DEVICE

Patent #:	7177183	Issue Dt:	02/13/2007	Application #:	10675212	Filing Dt:	09/30/2003
Publication #:	US20050078514	Pub Dt:	04/14/2005
Title:	MULTIPLE TWIN CELL NON-VOLATILE MEMORY ARRAY AND LOGIC BLOCK STRUCTURE AND METHOD THEREFOR

Patent #:	7057958	Issue Dt:	06/06/2006	Application #:	10676862	Filing Dt:	09/30/2003
Publication #:	US20050078537	Pub Dt:	04/14/2005
Title:	METHOD AND SYSTEM FOR TEMPERATURE COMPENSATION FOR MEMORY CELLS WITH TEMPERATURE-DEPENDENT BEHAVIOR

Patent #:	7245000	Issue Dt:	07/17/2007	Application #:	10681504	Filing Dt:	10/07/2003
Publication #:	US20040087072	Pub Dt:	05/06/2004
Title:	ELECTRICALLY ISOLATED PILLARS IN ACTIVE DEVICES

Patent #:	7413945	Issue Dt:	08/19/2008	Application #:	10681507	Filing Dt:	10/07/2003
Publication #:	US20040071034	Pub Dt:	04/15/2004
Title:	ELECTRICALLY ISOLATED PILLARS IN ACTIVE DEVICES

Patent #:	7195992	Issue Dt:	03/27/2007	Application #:	10681509	Filing Dt:	10/07/2003
Publication #:	US20050072976	Pub Dt:	04/07/2005
Title:	METHOD OF UNIFORM SEEDING TO CONTROL GRAIN AND DEFECT DENSITY OF CRYSTALLIZED SILICON FOR USE IN SUB-MICRON THIN FILM TRANSISTORS

Patent #:	NONE	Issue Dt:		Application #:	10689187	Filing Dt:	10/20/2003
Publication #:	US20040089917	Pub Dt:	05/13/2004
Title:	Three-dimensional memory array and method of fabrication

Patent #:	NONE	Issue Dt:		Application #:	10727765	Filing Dt:	12/03/2003
Publication #:	US20040108573	Pub Dt:	06/10/2004
Title:	Use in semiconductor devices of dielectric antifuses grown on silicide

Patent #:	6946719	Issue Dt:	09/20/2005	Application #:	10728230	Filing Dt:	12/03/2003
Publication #:	US20050121742	Pub Dt:	06/09/2005
Title:	SEMICONDUCTOR DEVICE INCLUDING JUNCTION DIODE CONTACTING CONTACT-ANTIFUSE UNIT COMPRISING SILICIDE

Patent #:	7172840	Issue Dt:	02/06/2007	Application #:	10728436	Filing Dt:	12/05/2003
Publication #:	US20050123837	Pub Dt:	06/09/2005
Title:	PHOTOMASK FEATURES WITH INTERIOR NONPRINTING WINDOW USING ALTERNATING PHASE SHIFTING

Patent #:	7423304	Issue Dt:	09/09/2008	Application #:	10728437	Filing Dt:	12/05/2003
Publication #:	US20050121790	Pub Dt:	06/09/2005
Title:	OPTIMIZATION OF CRITICAL DIMENSIONS AND PITCH OF PATTERNED FEATURES IN AND ABOVE A SUBSTRATE

Patent #:	7474000	Issue Dt:	01/06/2009	Application #:	10728451	Filing Dt:	12/05/2003
Publication #:	US20050127519	Pub Dt:	06/16/2005
Title:	HIGH DENSITY CONTACT TO RELAXED GEOMETRY LAYERS

Patent #:	7233522	Issue Dt:	06/19/2007	Application #:	10729831	Filing Dt:	12/05/2003
Publication #:	US20040145024	Pub Dt:	07/29/2004
Title:	NAND MEMORY ARRAY INCORPORATING CAPACITANCE BOOSTING OF CHANNEL REGIONS IN UNSELECTED MEMORY CELLS AND METHOD FOR OPERATION OF SAME

Patent #:	7221588	Issue Dt:	05/22/2007	Application #:	10729843	Filing Dt:	12/05/2003
Publication #:	US20050122779	Pub Dt:	06/09/2005
Title:	MEMORY ARRAY INCORPORATING MEMORY CELLS ARRANGED IN NAND STRINGS

Patent #:	7023739	Issue Dt:	04/04/2006	Application #:	10729844	Filing Dt:	12/05/2003
Publication #:	US20050122780	Pub Dt:	06/09/2005
Title:	NAND MEMORY ARRAY INCORPORATING MULTIPLE WRITE PULSE PROGRAMMING OF INDIVIDUAL MEMORY CELLS AND METHOD FOR OPERATION OF SAME

Patent #:	NONE	Issue Dt:		Application #:	10729865	Filing Dt:	12/05/2003
Publication #:	US20050128807	Pub Dt:	06/16/2005
Title:	Nand memory array incorporating multiple series selection devices and method for operation of same

Patent #:	6951780	Issue Dt:	10/04/2005	Application #:	10742204	Filing Dt:	12/18/2003
Title:	SELECTIVE OXIDATION OF SILICON IN DIODE, TFT, AND MONOLITHIC THREE DIMENSIONAL MEMORY ARRAYS

Patent #:	6825533	Issue Dt:	11/30/2004	Application #:	10756356	Filing Dt:	01/14/2004
Publication #:	US20040145005	Pub Dt:	07/29/2004
Title:	INVERTED STAGGERED THIN FILM TRANSISTOR WITH ETCH STOP LAYER AND METHOD OF MAKING SAME

Patent #:	7227188	Issue Dt:	06/05/2007	Application #:	10767525	Filing Dt:	01/29/2004
Publication #:	US20040183073	Pub Dt:	09/23/2004
Title:	LARGE GRAIN SIZE POLYSILICON FILMS FORMED BY NUCLEI-INDUCED SOLID PHASE CRYSTALLIZATION

Patent #:	7419701	Issue Dt:	09/02/2008	Application #:	10769047	Filing Dt:	01/30/2004
Publication #:	US20040235278	Pub Dt:	11/25/2004
Title:	LOW-TEMPERATURE, LOW-RESISTIVITY HEAVILY DOPED P-TYPE POLYSILICON DEPOSITION

Patent #:	7383476	Issue Dt:	06/03/2008	Application #:	10774758	Filing Dt:	02/09/2004
Publication #:	US20040250183	Pub Dt:	12/09/2004
Title:	SYSTEM ARCHITECTURE AND METHOD FOR THREE-DIMENSIONAL MEMORY

Patent #:	7190602	Issue Dt:	03/13/2007	Application #:	10774818	Filing Dt:	02/09/2004
Publication #:	US20050105371	Pub Dt:	05/19/2005
Title:	INTEGRATED CIRCUIT INCORPORATING THREE-DIMENSIONAL MEMORY ARRAY WITH DUAL OPPOSING DECODER ARRANGEMENT

Patent #:	6940109	Issue Dt:	09/06/2005	Application #:	10779760	Filing Dt:	02/18/2004
Publication #:	US20040159860	Pub Dt:	08/19/2004
Title:	HIGH DENSITY 3D RAIL STACK ARRAYS AND METHOD OF MAKING

Patent #:	7005730	Issue Dt:	02/28/2006	Application #:	10793407	Filing Dt:	03/04/2004
Publication #:	US20040169285	Pub Dt:	09/02/2004
Title:	MEMORY MODULE HAVING INTERCONNECTED AND STACKED INTEGRATED CIRCUITS

Patent #:	6982476	Issue Dt:	01/03/2006	Application #:	10800078	Filing Dt:	03/12/2004
Publication #:	US20040173904	Pub Dt:	09/09/2004
Title:	INTEGRATED CIRCUIT FEATURE LAYOUT FOR IMPROVED CHEMICAL MECHANICAL POLISHING

Patent #:	7091529	Issue Dt:	08/15/2006	Application #:	10805147	Filing Dt:	03/19/2004
Publication #:	US20040188798	Pub Dt:	09/30/2004
Title:	THREE-DIMENSIONAL MEMORY ARRAY AND METHOD OF FABRICATION

Patent #:	6925545	Issue Dt:	08/02/2005	Application #:	10806826	Filing Dt:	03/22/2004
Publication #:	US20040177229	Pub Dt:	09/09/2004
Title:	CONFIGURING FILE STRUCTURES AND FILE SYSTEM STRUCTURES IN A MEMORY DEVICE

Patent #:	6816410	Issue Dt:	11/09/2004	Application #:	10809146	Filing Dt:	03/25/2004
Publication #:	US20040179398	Pub Dt:	09/16/2004
Title:	METHOD FOR PROGRAMMING A THREE-DIMENSIONAL MEMORY ARRAY INCORPORATING SERIAL CHAIN DIODE STACK

Patent #:	6839262	Issue Dt:	01/04/2005	Application #:	10813455	Filing Dt:	03/29/2004
Publication #:	US20040184296	Pub Dt:	09/23/2004
Title:	MULTIPLE-MODE MEMORY AND METHOD FOR FORMING SAME

Patent #:	NONE	Issue Dt:		Application #:	10815312	Filing Dt:	04/01/2004
Publication #:	US20050221200	Pub Dt:	10/06/2005
Title:	Photomask features with chromeless nonprinting phase shifting window

Patent #:	7203084	Issue Dt:	04/10/2007	Application #:	10840815	Filing Dt:	05/06/2004
Publication #:	US20040206982	Pub Dt:	10/21/2004
Title:	THREE-DIMENSIONAL MEMORY DEVICE WITH ECC CIRCUITRY

Patent #:	7129538	Issue Dt:	10/31/2006	Application #:	10842008	Filing Dt:	05/10/2004
Publication #:	US20040206996	Pub Dt:	10/21/2004
Title:	DENSE ARRAYS AND CHARGE STORAGE DEVICES

Patent #:	7488625	Issue Dt:	02/10/2009	Application #:	10848601	Filing Dt:	05/17/2004
Publication #:	US20050026334	Pub Dt:	02/03/2005
Title:	VERTICALLY STACKED, FIELD PROGRAMMABLE, NONVOLATILE MEMORY AND METHOD OF FABRICATION

Patent #:	6992349	Issue Dt:	01/31/2006	Application #:	10849000	Filing Dt:	05/20/2004
Publication #:	US20040214379	Pub Dt:	10/28/2004
Title:	RAIL STACK ARRAY OF CHARGE STORAGE DEVICES AND METHOD OF MAKING SAME

Patent #:	7615436	Issue Dt:	11/10/2009	Application #:	10849152	Filing Dt:	05/20/2004
Publication #:	US20040207001	Pub Dt:	10/21/2004
Title:	TWO MASK FLOATING GATE EEPROM AND METHOD OF MAKING

Patent #:	7026212	Issue Dt:	04/11/2006	Application #:	10855775	Filing Dt:	05/26/2004
Publication #:	US20050014322	Pub Dt:	01/20/2005
Title:	METHOD FOR MAKING HIGH DENSITY NONVOLATILE MEMORY

Patent #:	6995422	Issue Dt:	02/07/2006	Application #:	10855778	Filing Dt:	05/26/2004
Publication #:	US20050012120	Pub Dt:	01/20/2005
Title:	A HIGH-DENSITY THREE-DIMENSIONAL MEMORY

Patent #:	6952030	Issue Dt:	10/04/2005	Application #:	10855784	Filing Dt:	05/26/2004
Publication #:	US20050012119	Pub Dt:	01/20/2005
Title:	A HIGH-DENSITY THREE-DIMENSIONAL MEMORY CELL

Patent #:	6960495	Issue Dt:	11/01/2005	Application #:	10855785	Filing Dt:	05/26/2004
Publication #:	US20050012220	Pub Dt:	01/20/2005
Title:	AN IMPROVED METHOD FOR MAKING CONTACTS IN A HIGH-DENISITY MEMORY

Patent #:	6984561	Issue Dt:	01/10/2006	Application #:	10855804	Filing Dt:	05/26/2004
Publication #:	US20050014334	Pub Dt:	01/20/2005
Title:	METHOD FOR MAKING HIGH DENSITY NONVOLATILE MEMORY

Patent #:	7009275	Issue Dt:	03/07/2006	Application #:	10855880	Filing Dt:	05/26/2004
Publication #:	US20050012154	Pub Dt:	01/20/2005
Title:	METHOD FOR MAKING HIGH DENSITY NONVOLATILE MEMORY

Patent #:	7307013	Issue Dt:	12/11/2007	Application #:	10883417	Filing Dt:	06/30/2004
Publication #:	US20060003586	Pub Dt:	01/05/2006
Title:	NONSELECTIVE UNPATTERNED ETCHBACK TO EXPOSE BURIED PATTERNED FEATURES

Patent #:	7432141	Issue Dt:	10/07/2008	Application #:	10936168	Filing Dt:	09/08/2004
Publication #:	US20060051911	Pub Dt:	03/09/2006
Title:	LARGE-GRAIN P-DOPED POLYSILICON FILMS FOR USE IN THIN FILM TRANSISTORS

Patent #:	7176064	Issue Dt:	02/13/2007	Application #:	10954510	Filing Dt:	09/29/2004
Publication #:	US20050121743	Pub Dt:	06/09/2005
Title:	MEMORY CELL COMPRISING A SEMICONDUCTOR JUNCTION DIODE CRYSTALLIZED ADJACENT TO A SILICIDE

Patent #:	7224013	Issue Dt:	05/29/2007	Application #:	10954577	Filing Dt:	09/29/2004
Publication #:	US20060073657	Pub Dt:	04/06/2006
Title:	JUNCTION DIODE COMPRISING VARYING SEMICONDUCTOR COMPOSITIONS

Patent #:	7149119	Issue Dt:	12/12/2006	Application #:	10955048	Filing Dt:	09/30/2004
Publication #:	US20060083069	Pub Dt:	04/20/2006
Title:	SYSTEM AND METHOD OF CONTROLLING A THREE-DIMENSIONAL MEMORY

Patent #:	NONE	Issue Dt:		Application #:	10955049	Filing Dt:	09/30/2004
Publication #:	US20060067127	Pub Dt:	03/30/2006
Title:	Method of programming a monolithic three-dimensional memory

100

Patent #:	NONE	Issue Dt:		Application #:	10955387	Filing Dt:	09/29/2004
Publication #:	US20060067117	Pub Dt:	03/30/2006
Title:	Fuse memory cell comprising a diode, the diode serving as the fuse element

Assignor

MATRIX SEMICONDUCTOR, INC.

Exec Dt:

10/20/2005

Assignee

SANDISK 3D LLC

140 CASPIAN COURT

SUNNYVALE, CALIFORNIA 94089

Correspondence name and address
	BRADFORD L. FRIEDMAN
	140 CASPIAN COURT
	SUNNYVALE, CA 94089

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