skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:017564/0653   Pages: 6
Recorded: 05/04/2006
Attorney Dkt #:MEGICA ASSIGNMENTS ISSUED
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 35
1
Patent #:
6350705
Issue Dt:
02/26/2002
Application #:
09617012
Filing Dt:
07/14/2000
Title:
Wafer scale packaging scheme
2
Patent #:
6399997
Issue Dt:
06/04/2002
Application #:
09631041
Filing Dt:
08/01/2000
Title:
High performance system-on-chip using post passivation process and glass substrates
3
Patent #:
6809935
Issue Dt:
10/26/2004
Application #:
09684519
Filing Dt:
10/10/2000
Title:
THERMALLY COMPLIANT PCB SUBSTRATE FOR THE APPLICATION OF CHIP SCALE PACKAGES
4
Patent #:
6495442
Issue Dt:
12/17/2002
Application #:
09691497
Filing Dt:
10/18/2000
Title:
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
5
Patent #:
6387801
Issue Dt:
05/14/2002
Application #:
09707295
Filing Dt:
11/07/2000
Title:
METHOD AND AN APPARATUS TO ELECTROLESS PLATE A METAL LAYER WHILE ELIMINATING THE PHOTOELECTRIC EFFECT
6
Patent #:
6303423
Issue Dt:
10/16/2001
Application #:
09721722
Filing Dt:
11/27/2000
Title:
METHOD FOR FORMING HIGH PERFORMANCE SYSTEM -ON-CHIP USING POST PASSIVATION PROCESS
7
Patent #:
6426556
Issue Dt:
07/30/2002
Application #:
09760909
Filing Dt:
01/16/2001
Publication #:
US20020105076
Pub Dt:
08/08/2002
Title:
RELIABLE METAL BUMPS ON TOP OF I/O PADS WITH TEST PROBE MARKS
8
Patent #:
6815324
Issue Dt:
11/09/2004
Application #:
09783384
Filing Dt:
02/15/2001
Publication #:
US20020111009
Pub Dt:
08/15/2002
Title:
RELIABLE METAL BUMPS ON TOP OF I/O PADS AFTER REMOVAL OF TEST PROBE MARKS
9
Patent #:
6818545
Issue Dt:
11/16/2004
Application #:
09798654
Filing Dt:
03/05/2001
Publication #:
US20020121692
Pub Dt:
09/05/2002
Title:
LOW FABRICATION COST, FINE PITCH AND HIGH RELIABILITY SOLDER BUMP
10
Patent #:
6586266
Issue Dt:
07/01/2003
Application #:
09849039
Filing Dt:
05/04/2001
Title:
HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY
11
Patent #:
6593649
Issue Dt:
07/15/2003
Application #:
09858528
Filing Dt:
05/17/2001
Title:
METHODS OF IC REROUTING OPTION FOR MULTIPLE PACKAGE SYSTEM APPLICATIONS
12
Patent #:
6638840
Issue Dt:
10/28/2003
Application #:
09932729
Filing Dt:
08/20/2001
Title:
ELECTRODE FOR ELECTROPLATING PLANAR STRUCTURES
13
Patent #:
6759275
Issue Dt:
07/06/2004
Application #:
09945436
Filing Dt:
09/04/2001
Title:
METHOD FOR MAKING HIGH-PERFORMANCE RF INTEGRATED CIRCUITS
14
Patent #:
6642136
Issue Dt:
11/04/2003
Application #:
09953525
Filing Dt:
09/17/2001
Title:
METHOD MAKING A LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE PACKAGE
15
Patent #:
6613606
Issue Dt:
09/02/2003
Application #:
09953544
Filing Dt:
09/17/2001
Title:
STRUCTURE OF HIGH PERFORMANCE COMBO CHIP AND PROCESSING METHOD
16
Patent #:
6495912
Issue Dt:
12/17/2002
Application #:
09953610
Filing Dt:
09/17/2001
Title:
STRUCTURE OF CERAMIC PACKAGE WITH INTEGRATED PASSIVE DEVICES
17
Patent #:
6939747
Issue Dt:
09/06/2005
Application #:
09961767
Filing Dt:
09/21/2001
Title:
MULTIPLE SELECTABLE FUNCTION INTEGRATED CIRCUIT MODULE
18
Patent #:
6455885
Issue Dt:
09/24/2002
Application #:
09970005
Filing Dt:
10/03/2001
Publication #:
US20020064922
Pub Dt:
05/30/2002
Title:
INDUCTOR STRUCTURE FOR HIGH PERFORMANCE SYSTEM-ON-CHIP USING POST PASSIVATION PROCESS
19
Patent #:
6649509
Issue Dt:
11/18/2003
Application #:
09998862
Filing Dt:
10/24/2001
Title:
POST PASSIVATION METAL SCHEME FOR HIGH-PERFORMACNE INTEGRATED CIRCUIT DEVICES
20
Patent #:
6605528
Issue Dt:
08/12/2003
Application #:
10004027
Filing Dt:
10/24/2001
Title:
POST PASSIVATION METAL SCHEME FOR HIGH-PERFORMANCE INTEGRATED CIRCUIT DEVICES
21
Patent #:
6673698
Issue Dt:
01/06/2004
Application #:
10054001
Filing Dt:
01/19/2002
Title:
THIN FILM SEMICONDUCTOR PACKAGE UTILIZING A GLASS SUBSTRATE WITH COMOSITE POLYMER/METAL INTERCONNECT LAYERS
22
Patent #:
6620728
Issue Dt:
09/16/2003
Application #:
10058259
Filing Dt:
01/29/2002
Publication #:
US20020068441
Pub Dt:
06/06/2002
Title:
TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S
23
Patent #:
6522009
Issue Dt:
02/18/2003
Application #:
10117888
Filing Dt:
04/08/2002
Publication #:
US20020111019
Pub Dt:
08/15/2002
Title:
AN APPARATUS TO ELECTROLESS PLATE A METAL LAYER WHILE ELIMINATING THE PHOTO ELECTRIC EFFECT
24
Patent #:
6515369
Issue Dt:
02/04/2003
Application #:
10156412
Filing Dt:
05/28/2002
Title:
HIGH PERFORMANCE SYSTEM-ON-CHIP USING POST PASSIVATION PROCESS
25
Patent #:
6489656
Issue Dt:
12/03/2002
Application #:
10156589
Filing Dt:
05/28/2002
Title:
A RESISTOR FOR HIGH PERFORMANCE SYSTEM-ON-CHIP USING POST PASSIVATION PROCESS
26
Patent #:
6489647
Issue Dt:
12/03/2002
Application #:
10156590
Filing Dt:
05/28/2002
Title:
A CAPACITOR FOR HIGH PERFORMANCE SYSTEM-ON-CHIP USING POST PASSIVATION PROCESS STRUCTURE
27
Patent #:
6734563
Issue Dt:
05/11/2004
Application #:
10278106
Filing Dt:
10/22/2002
Publication #:
US20030057531
Pub Dt:
03/27/2003
Title:
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS
28
Patent #:
6806570
Issue Dt:
10/19/2004
Application #:
10279267
Filing Dt:
10/24/2002
Title:
THERMAL COMPLIANT SEMICONDUCTOR CHIP WIRING STRUCTURE FOR CHIP SCALE PACKAGING
29
Patent #:
6897507
Issue Dt:
05/24/2005
Application #:
10303451
Filing Dt:
11/25/2002
Publication #:
US20030071326
Pub Dt:
04/17/2003
Title:
CAPACITOR FOR HIGH PERFORMANCE SYSTEM-ON-CHIP USING POST PASSIVATION DEVICE
30
Patent #:
6802945
Issue Dt:
10/12/2004
Application #:
10336871
Filing Dt:
01/06/2003
Publication #:
US20040129558
Pub Dt:
07/08/2004
Title:
METHOD OF METAL SPUTTERING FOR INTEGRATED CIRCUIT METAL ROUTING
31
Patent #:
6791192
Issue Dt:
09/14/2004
Application #:
10371506
Filing Dt:
02/21/2003
Publication #:
US20030122240
Pub Dt:
07/03/2003
Title:
PRIMARY CHIPS BONDED TO A PRINTED CIRCUIT BOARD SUPPORTING A SECONDARY CHIP IN A CHIP-ON-CHIP CONNECTION
32
Patent #:
6768208
Issue Dt:
07/27/2004
Application #:
10437355
Filing Dt:
05/13/2003
Publication #:
US20030197287
Pub Dt:
10/23/2003
Title:
MULTIPLE CHIPS BONDED TO PACKAGING STRUCTURE WITH LOW NOISE AND MULTIPLE SELECTABLE FUNCTIONS
33
Patent #:
6869870
Issue Dt:
03/22/2005
Application #:
10445560
Filing Dt:
05/27/2003
Publication #:
US20040016948
Pub Dt:
01/29/2004
Title:
HIGH PERFORMANCE SYSTEM-ON-CHIP DISCRETE COMPONENTS USING POST PASSIVATION PROCESS
34
Patent #:
6768194
Issue Dt:
07/27/2004
Application #:
10462251
Filing Dt:
06/16/2003
Publication #:
US20030211674
Pub Dt:
11/13/2003
Title:
ELECTRODE FOR ELECTROPLATING PLANAR STRUCTURES
35
Patent #:
6917119
Issue Dt:
07/12/2005
Application #:
10638454
Filing Dt:
08/11/2003
Publication #:
US20040032024
Pub Dt:
02/19/2004
Title:
LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE PACKAGE
Assignor
1
MEGIC CORPORATION
Exec Dt:
04/28/2006
Assignee
1
MEGICA CORPORATION
NO. 47, PARK 2ND RD. SCIENCE-BASED INDUSTRIAL PARK
ROOM 301/302
HSINCHU, TAIWAN
Correspondence name and address
SAILE ACKERMAN, LLC
28 DAVIS AVENUE
POUGHKEEPSIE, NY 12603

Search Results as of: 05/16/2024 09:47 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT