Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 017626/0739 | |
| Pages: | 3 |
| | Recorded: | 05/17/2006 | | |
| Attorney Dkt #: | N426, N426C |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
2
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Patent #:
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Issue Dt:
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01/23/1996
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Application #:
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08290549
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Filing Dt:
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08/15/1994
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Title:
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METHOD FOR READ CYCLE INTERRUPTS IN A DYNAMIC READ-ONLY MEMORY
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08927773
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Filing Dt:
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09/11/1997
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Title:
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VLSI MEMORY CIRCUIT
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Assignee
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| 1700 E. GARRY AVENUE, SUITE 112 |
| SANTA ANA, CALIFORNIA 92705 |
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Correspondence name and address
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CREATIVE INTEGRATED SYSTEMS, INC.
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1700 E. GARRY AVENUE, SUITE 112
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SANTA ANA, CA 92705
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