Patent Assignment Details
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| Reel/Frame: | 017663/0044 | |
| Pages: | 5 |
| | Recorded: | 05/22/2006 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09841209
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Filing Dt:
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04/23/2001
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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METHODS FOR CONFIGURING FPGA ' S HAVING VARIABLE GRAIN COMPONENTS FOR PROVIDING TIME-SHARED ACCESS TO INTERCONNECT RESOURCES
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Assignee
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| 5555 NE MOORE CT |
| HILLSBORO, OREGON 97124 |
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Correspondence name and address
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MARK BECKER
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LATTICE SEMICONDUCTOR CORPORATION
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5555 NE MOORE CT
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HILLSBORO, OR 97124
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