Patent Assignment Details
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Reel/Frame: | 017676/0178 | |
| Pages: | 2 |
| | Recorded: | 03/13/2006 | | |
Attorney Dkt #: | 075149-0013 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11373179
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Filing Dt:
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03/13/2006
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Publication #:
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Pub Dt:
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09/21/2006
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Title:
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Semiconductor memory and method for analyzing failure of semiconductor memory
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Assignee
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2-1, YAESU 2-CHOME |
CHUO-KU |
TOKYO, JAPAN |
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Correspondence name and address
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MCDERMOTT WILL & EMERY LLP
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600 13TH STREET, NW
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WASHINTON, D.C. 20005-3096
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