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Reel/Frame:017718/0550   Pages: 4
Recorded: 06/05/2006
Attorney Dkt #:MATRIX-000
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 73
1
Patent #:
6034882
Issue Dt:
03/07/2000
Application #:
09192883
Filing Dt:
11/16/1998
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
2
Patent #:
6185122
Issue Dt:
02/06/2001
Application #:
09469658
Filing Dt:
12/22/1999
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATIE MEMORY AND METHOD OF FABRICATION
3
Patent #:
6545891
Issue Dt:
04/08/2003
Application #:
09638334
Filing Dt:
08/14/2000
Title:
MODULAR MEMORY DEVICE
4
Patent #:
6424581
Issue Dt:
07/23/2002
Application #:
09638427
Filing Dt:
08/14/2000
Title:
WRITE-ONCE MEMORY ARRAY CONTROLLER, SYSTEM, AND METHOD
5
Patent #:
6658438
Issue Dt:
12/02/2003
Application #:
09638439
Filing Dt:
08/14/2000
Title:
METHOD FOR DELETING STORED DIGITAL DATA FROM WRITE-ONCE MEMORY DEVICE
6
Patent #:
6580124
Issue Dt:
06/17/2003
Application #:
09639577
Filing Dt:
08/14/2000
Title:
MULTIGATE SEMICONDUCTOR DEVICE WITH VERTICAL CHANNEL CURRENT AND METHOD OF FABRICATION
7
Patent #:
6624011
Issue Dt:
09/23/2003
Application #:
09639750
Filing Dt:
08/14/2000
Title:
THERMAL PROCESSING FOR THREE DIMENSIONAL CIRCUITS
8
Patent #:
6351406
Issue Dt:
02/26/2002
Application #:
09714440
Filing Dt:
11/15/2000
Title:
Vertically stacked field programmable nonvolatile memory and method of fabrication
9
Patent #:
6584541
Issue Dt:
06/24/2003
Application #:
09727229
Filing Dt:
11/30/2000
Publication #:
US20020065983
Pub Dt:
05/30/2002
Title:
METHOD FOR STORING DIGITAL INFORMATION IN WRITE-ONCE MEMORY ARRAY
10
Patent #:
6541312
Issue Dt:
04/01/2003
Application #:
09746083
Filing Dt:
12/22/2000
Publication #:
US20030003632
Pub Dt:
01/02/2003
Title:
FORMATION OF ANTIFUSE STRUCTURE IN A THREE DIMENSIONAL MEMORY
11
Patent #:
6627530
Issue Dt:
09/30/2003
Application #:
09746204
Filing Dt:
12/22/2000
Publication #:
US20020081833
Pub Dt:
06/27/2002
Title:
PATTERNING THREE DIMENSIONAL STRUCTURES
12
Patent #:
6664639
Issue Dt:
12/16/2003
Application #:
09746341
Filing Dt:
12/22/2000
Publication #:
US20020079553
Pub Dt:
06/27/2002
Title:
CONTACT AND VIA STRUCTURE AND METHOD OF FABRICATION
13
Patent #:
6486065
Issue Dt:
11/26/2002
Application #:
09746469
Filing Dt:
12/22/2000
Publication #:
US20020081851
Pub Dt:
06/27/2002
Title:
METHOD OF FORMING NONVOLATILE MEMORY DEVICE UTILIZING A HARD MASK
14
Patent #:
6591394
Issue Dt:
07/08/2003
Application #:
09747574
Filing Dt:
12/22/2000
Publication #:
US20020083390
Pub Dt:
06/27/2002
Title:
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD FOR STORING DATA BITS AND ECC BITS THEREIN
15
Patent #:
NONE
Issue Dt:
Application #:
09748589
Filing Dt:
12/22/2000
Publication #:
US20030120858
Pub Dt:
06/26/2003
Title:
Memory devices and methods for use therewith
16
Patent #:
6661730
Issue Dt:
12/09/2003
Application #:
09748649
Filing Dt:
12/22/2000
Title:
PARTIAL SELECTION OF PASSIVE ELEMENT MEMORY CELL SUB-ARRAYS FOR WRITE OPERATION
17
Patent #:
6525949
Issue Dt:
02/25/2003
Application #:
09748815
Filing Dt:
12/22/2000
Title:
CHARGE PUMP CIRCUIT
18
Patent #:
6385074
Issue Dt:
05/07/2002
Application #:
09748816
Filing Dt:
12/22/2000
Title:
INTEGRATED CIRCUIT STRUCTURE INCLUDING THREE-DIMENSIONAL MEMORY ARRAY
19
Patent #:
NONE
Issue Dt:
Application #:
09775745
Filing Dt:
02/02/2001
Publication #:
US20020108054
Pub Dt:
08/08/2002
Title:
Solid-state memory device storing program code and methods for use therewith
20
Patent #:
6486066
Issue Dt:
11/26/2002
Application #:
09775761
Filing Dt:
02/02/2001
Publication #:
US20020106837
Pub Dt:
08/08/2002
Title:
METHOD OF GENERATING INTEGRATED CIRCUIT FEATURE LAYOUT FOR IMPROVED CHEMICAL MECHANICAL POLISHING
21
Patent #:
6778974
Issue Dt:
08/17/2004
Application #:
09775939
Filing Dt:
02/02/2001
Publication #:
US20020107862
Pub Dt:
08/08/2002
Title:
MEMORY DEVICE AND METHOD FOR READING DATA STORED IN A PORTION OF A MEMORY DEVICE UNREADABLE BY A FILE SYSTEM OF A HOST DEVICE
22
Patent #:
6407953
Issue Dt:
06/18/2002
Application #:
09775956
Filing Dt:
02/02/2001
Title:
Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
23
Patent #:
6649451
Issue Dt:
11/18/2003
Application #:
09776000
Filing Dt:
02/02/2001
Title:
STRUCTURE AND METHOD FOR WAFER COMPRISING DIELECTRIC AND SEMICONDUCTOR
24
Patent #:
NONE
Issue Dt:
Application #:
09776009
Filing Dt:
02/02/2001
Publication #:
US20020105057
Pub Dt:
08/08/2002
Title:
Wafer surface that facilitates particle removal
25
Patent #:
7352199
Issue Dt:
04/01/2008
Application #:
09788864
Filing Dt:
02/20/2001
Publication #:
US20020116668
Pub Dt:
08/22/2002
Title:
MEMORY CARD WITH ENHANCED TESTABILITY AND METHODS OF MAKING AND USING THE SAME
26
Patent #:
6486728
Issue Dt:
11/26/2002
Application #:
09809878
Filing Dt:
03/16/2001
Publication #:
US20020130701
Pub Dt:
09/19/2002
Title:
MULTI-STAGE CHARGE PUMP
27
Patent #:
6515537
Issue Dt:
02/04/2003
Application #:
09809884
Filing Dt:
03/16/2001
Publication #:
US20020130706
Pub Dt:
09/19/2002
Title:
INTEGRATED CIRCUIT CURRENT SOURCE WITH SWITCHED CAPACITOR FEEDBACK
28
Patent #:
6420215
Issue Dt:
07/16/2002
Application #:
09814727
Filing Dt:
03/21/2001
Publication #:
US20020088998
Pub Dt:
07/11/2002
Title:
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD OF FABRICATION
29
Patent #:
7424201
Issue Dt:
09/09/2008
Application #:
09823489
Filing Dt:
03/30/2001
Publication #:
US20020144277
Pub Dt:
10/03/2002
Title:
METHOD FOR FIELD-PROGRAMMING A SOLID-STATE MEMORY DEVICE WITH A DIGITAL MEDIA FILE
30
Patent #:
6501139
Issue Dt:
12/31/2002
Application #:
09823503
Filing Dt:
03/30/2001
Publication #:
US20030011033
Pub Dt:
01/16/2003
Title:
HIGH-VOLTAGE TRANSISTOR AND FABRICATION PROCESS
31
Patent #:
6635556
Issue Dt:
10/21/2003
Application #:
09859282
Filing Dt:
05/17/2001
Title:
METHOD OF PREVENTING AUTODOPING
32
Patent #:
7003619
Issue Dt:
02/21/2006
Application #:
09877719
Filing Dt:
06/08/2001
Title:
MEMORY DEVICE AND METHOD FOR STORING AND READING A FILE SYSTEM STRUCTURE IN A WRITE-ONCE MEMORY ARRAY
33
Patent #:
6996660
Issue Dt:
02/07/2006
Application #:
09877720
Filing Dt:
06/08/2001
Title:
MEMORY DEVICE AND METHOD FOR STORING AND READING DATA IN A WRITE-ONCE MEMORY ARRAY
34
Patent #:
6515904
Issue Dt:
02/04/2003
Application #:
09895960
Filing Dt:
06/29/2001
Publication #:
US20020136059
Pub Dt:
09/26/2002
Title:
METHOD AND SYSTEM FOR INCREASING PROGRAMMING BANDWIDTH IN A NON-VOLATILE MEMORY DEVICE
35
Patent #:
6567287
Issue Dt:
05/20/2003
Application #:
09896814
Filing Dt:
06/29/2001
Publication #:
US20020136045
Pub Dt:
09/26/2002
Title:
MEMORY DEVICE WITH ROW AND COLUMN DECODER CIRCUITS ARRANGED IN A CHECKERBOARD PATTERN UNDER A PLURALITY OF MEMORY ARRAYS
36
Patent #:
6574145
Issue Dt:
06/03/2003
Application #:
09896815
Filing Dt:
06/29/2001
Publication #:
US20020136076
Pub Dt:
09/26/2002
Title:
MEMORY DEVICE AND METHOD FOR SENSING WHILE PROGRAMMING A NON-VOLATILE MEMORY CELL
37
Patent #:
6522594
Issue Dt:
02/18/2003
Application #:
09897704
Filing Dt:
06/29/2001
Title:
MEMORY ARRAY INCORPORATING NOISE DETECTION LINE
38
Patent #:
6631085
Issue Dt:
10/07/2003
Application #:
09897705
Filing Dt:
06/29/2001
Publication #:
US20030053332
Pub Dt:
03/20/2003
Title:
THREE-DIMENSIONAL MEMORY ARRAY INCORPORATING SERIAL CHAIN DIODE STACK
39
Patent #:
6618295
Issue Dt:
09/09/2003
Application #:
09897771
Filing Dt:
06/29/2001
Publication #:
US20020136047
Pub Dt:
09/26/2002
Title:
METHOD AND APPARATUS FOR BIASING SELECTED AND UNSELECTED ARRAY LINES WHEN WRITING A MEMORY ARRAY
40
Patent #:
6504753
Issue Dt:
01/07/2003
Application #:
09897784
Filing Dt:
06/29/2001
Title:
METHOD AND APPARATUS FOR DISCHARGING MEMORY ARRAY LINES
41
Patent #:
6545898
Issue Dt:
04/08/2003
Application #:
09897785
Filing Dt:
06/29/2001
Title:
METHOD AND APPARATUS FOR WRITING MEMORY ARRAYS USING EXTERNAL SOURCE OF HIGH PROGRAMMING VOLTAGE
42
Patent #:
NONE
Issue Dt:
Application #:
09918307
Filing Dt:
07/30/2001
Publication #:
US20030026157
Pub Dt:
02/06/2003
Title:
Anti-fuse memory cell with asymmetric breakdown voltage
43
Patent #:
7816188
Issue Dt:
10/19/2010
Application #:
09918853
Filing Dt:
07/30/2001
Publication #:
US20030022526
Pub Dt:
01/30/2003
Title:
PROCESS FOR FABRICATING A DIELECTRIC FILM USING PLASMA OXIDATION
44
Patent #:
6888750
Issue Dt:
05/03/2005
Application #:
09927642
Filing Dt:
08/13/2001
Publication #:
US20010055838
Pub Dt:
12/27/2001
Title:
NONVOLATILE MEMORY ON SOI AND COMPOUND SEMICONDUCTOR SUBSTRATES AND METHOD OF FABRICATION
45
Patent #:
6881994
Issue Dt:
04/19/2005
Application #:
09927648
Filing Dt:
08/13/2001
Publication #:
US20020028541
Pub Dt:
03/07/2002
Title:
MONOLITHIC THREE DIMENSIONAL ARRAY OF CHARGE STORAGE DEVICES CONTAINING A PLANARIZED SURFACE
46
Patent #:
6525953
Issue Dt:
02/25/2003
Application #:
09928536
Filing Dt:
08/13/2001
Title:
VERTICALLY-STACKED, FIELD-PROGRAMMABLE, NONVOLATILE MEMORY AND METHOD OF FABRICATION
47
Patent #:
6843421
Issue Dt:
01/18/2005
Application #:
09928767
Filing Dt:
08/13/2001
Publication #:
US20030029920
Pub Dt:
02/13/2003
Title:
MOLDED MEMORY MODULE AND METHOD OF MAKING THE MODULE ABSENT A SUBSTRATE SUPPORT
48
Patent #:
6515888
Issue Dt:
02/04/2003
Application #:
09928969
Filing Dt:
08/13/2001
Publication #:
US20020075719
Pub Dt:
06/20/2002
Title:
LOW-COST THREE-DIMENSIONAL MEMORY ARRAY
49
Patent #:
7148570
Issue Dt:
12/12/2006
Application #:
09928975
Filing Dt:
08/13/2001
Publication #:
US20030030148
Pub Dt:
02/13/2003
Title:
LOW RESISTIVITY TITANIUM SILICIDE ON HEAVILY DOPED SEMICONDUCTOR
50
Patent #:
6490218
Issue Dt:
12/03/2002
Application #:
09932701
Filing Dt:
08/17/2001
Title:
DIGITAL MEMORY METHOD AND SYSTEM FOR STORING MULTIPLE BIT DIGITAL DATA
51
Patent #:
6730931
Issue Dt:
05/04/2004
Application #:
09935862
Filing Dt:
08/22/2001
Publication #:
US20020104991
Pub Dt:
08/08/2002
Title:
INTEGRATED CIRCUIT FEATURE LAYOUT FOR IMPROVED CHEMICAL MECHANICAL POLISHING
52
Patent #:
6534403
Issue Dt:
03/18/2003
Application #:
09939321
Filing Dt:
08/24/2001
Publication #:
US20020081782
Pub Dt:
06/27/2002
Title:
CONTACT AND VIA STRUCTURE AND METHOD OF FABRICATION
53
Patent #:
6483736
Issue Dt:
11/19/2002
Application #:
09939431
Filing Dt:
08/24/2001
Publication #:
US20020027793
Pub Dt:
03/07/2002
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
54
Patent #:
7157314
Issue Dt:
01/02/2007
Application #:
09939498
Filing Dt:
08/24/2001
Publication #:
US20030206429
Pub Dt:
11/06/2003
Title:
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
55
Patent #:
6724665
Issue Dt:
04/20/2004
Application #:
09943655
Filing Dt:
08/31/2001
Publication #:
US20030043643
Pub Dt:
03/06/2003
Title:
MEMORY DEVICE AND METHOD FOR SELECTABLE SUB-ARRAY ACTIVATION
56
Patent #:
6735546
Issue Dt:
05/11/2004
Application #:
09944613
Filing Dt:
08/31/2001
Publication #:
US20030046020
Pub Dt:
03/06/2003
Title:
MEMORY DEVICE AND METHOD FOR TEMPERATURE-BASED CONTROL OVER WRITE AND/OR READ OPERATIONS
57
Patent #:
6593624
Issue Dt:
07/15/2003
Application #:
09961278
Filing Dt:
09/25/2001
Publication #:
US20030057435
Pub Dt:
03/27/2003
Title:
THIN FILM TRANSISTORS WITH VERTICALLY OFFSET DRAIN REGIONS
58
Patent #:
7000063
Issue Dt:
02/14/2006
Application #:
09972787
Filing Dt:
10/05/2001
Publication #:
US20030070034
Pub Dt:
04/10/2003
Title:
WRITE-MANY MEMORY DEVICE AND METHOD FOR LIMITING A NUMBER OF WRITES TO THE WRITE-MANY MEMORY DEVICE
59
Patent #:
6841813
Issue Dt:
01/11/2005
Application #:
09983988
Filing Dt:
10/26/2001
Publication #:
US20030030074
Pub Dt:
02/13/2003
Title:
TFT MASK ROM AND METHOD FOR MAKING SAME
60
Patent #:
6768685
Issue Dt:
07/27/2004
Application #:
09990894
Filing Dt:
11/16/2001
Title:
INTEGRATED CIRCUIT MEMORY ARRAY WITH FAST TEST MODE UTILIZING MULTIPLE WORD LINE SELECTION AND METHOD THEREFOR
61
Patent #:
6889307
Issue Dt:
05/03/2005
Application #:
09990901
Filing Dt:
11/16/2001
Title:
INTEGRATED CIRCUIT INCORPORATING DUAL ORGANIZATION MEMORY ARRAY
62
Patent #:
6515923
Issue Dt:
02/04/2003
Application #:
10002268
Filing Dt:
11/15/2001
Title:
MEMORY ARRAY ORGANIZATION AND RELATED TEST METHOD PARTICULARLY WELL SUITED FOR INTEGRATED CIRCUITS HAVING WRITE-ONCE MEMORY ARRAYS
63
Patent #:
6483728
Issue Dt:
11/19/2002
Application #:
10002856
Filing Dt:
11/15/2001
Title:
CHARGE PUMP CIRCUIT
64
Patent #:
6624485
Issue Dt:
09/23/2003
Application #:
10010643
Filing Dt:
11/05/2001
Publication #:
US20030086284
Pub Dt:
05/08/2003
Title:
THREE-DIMENSIONAL, MASK-PROGRAMMED READ ONLY MEMORY
65
Patent #:
6901549
Issue Dt:
05/31/2005
Application #:
10023200
Filing Dt:
12/14/2001
Publication #:
US20030115535
Pub Dt:
06/19/2003
Title:
METHOD FOR ALTERING A WORD STORED IN A WRITE-ONCE MEMORY DEVICE
66
Patent #:
6563745
Issue Dt:
05/13/2003
Application #:
10023466
Filing Dt:
12/14/2001
Title:
MEMORY DEVICE AND METHOD FOR DYNAMIC BIT INVERSION
67
Patent #:
6895490
Issue Dt:
05/17/2005
Application #:
10023468
Filing Dt:
12/14/2001
Title:
METHOD FOR MAKING A WRITE-ONCE MEMORY DEVICE READ COMPATIBLE WITH A WRITE-MANY FILE SYSTEM
68
Patent #:
7219271
Issue Dt:
05/15/2007
Application #:
10024646
Filing Dt:
12/14/2001
Publication #:
US20030115518
Pub Dt:
06/19/2003
Title:
MEMORY DEVICE AND METHOD FOR REDUNDANCY/SELF-REPAIR
69
Patent #:
6928590
Issue Dt:
08/09/2005
Application #:
10024647
Filing Dt:
12/14/2001
Publication #:
US20030115514
Pub Dt:
06/19/2003
Title:
MEMORY DEVICE AND METHOD FOR STORING BITS IN NON-ADJACENT STORAGE LOCATIONS IN A MEMORY ARRAY
70
Patent #:
6704235
Issue Dt:
03/09/2004
Application #:
10027466
Filing Dt:
12/20/2001
Publication #:
US20030026158
Pub Dt:
02/06/2003
Title:
ANTI-FUSE MEMORY CELL WITH ASYMMETRIC BREAKDOWN VOLTAGE
71
Patent #:
6639312
Issue Dt:
10/28/2003
Application #:
10036291
Filing Dt:
11/07/2001
Publication #:
US20030087108
Pub Dt:
05/08/2003
Title:
DUMMY WAFERS AND METHODS FOR MAKING THE SAME
72
Patent #:
7018878
Issue Dt:
03/28/2006
Application #:
10045653
Filing Dt:
11/07/2001
Publication #:
US20030087484
Pub Dt:
05/08/2003
Title:
METAL STRUCTURES FOR INTEGRATED CIRCUITS AND METHODS FOR MAKING THE SAME
73
Patent #:
NONE
Issue Dt:
Application #:
10079472
Filing Dt:
02/19/2002
Publication #:
US20030155582
Pub Dt:
08/21/2003
Title:
Gate dielectric structures for integrated circuits and methods for making and using such gate dielectric structures
Assignor
1
SILICON VALLEY BANK
Exec Dt:
01/13/2006
Assignee
1
SANDISK 3D LLC
601 MCCARTHY BOULEVARD
MILPITAS, CALIFORNIA 95035
Correspondence name and address
CASEY HAGOPIAN
601 MCCARTHY BOULEVARD
MILPITAS, CA 95035

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