Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 017807/0901 | |
| Pages: | 8 |
| | Recorded: | 06/19/2006 | | |
| Attorney Dkt #: | 5649-1939 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11424995
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Filing Dt:
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06/19/2006
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Publication #:
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Pub Dt:
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12/28/2006
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Title:
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Methods of Forming Integrated Circuit Devices Including Memory Cell Gates and High Voltage Transistor Gates Using Plasma Re-Oxidation
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Assignee
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| 416 MAETAN-DONG, YEONGTONG-GU |
| SUWON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF |
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Correspondence name and address
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MYERS BIGEL SIBLEY & SAJOVEC PA
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4140 PARKLAKE AVENUE
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SUITE 600
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RALEIGH, NC 27612
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