Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 017918/0144 | |
| Pages: | 5 |
| | Recorded: | 07/12/2006 | | |
Attorney Dkt #: | CHRT-99203.DIV |
Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 016380 FRAME 0573. ASSIGNOR(S) HEREBY CONFIRMS THE THE CORRECT SPELLING OF ASSIGNEE NAME IS "CHARTERED SEMICONDUCTOR MANUFACTURING LTD". |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
09904981
|
Filing Dt:
|
07/12/2001
|
Title:
|
POLISHING APPARATUS AND METHOD FOR FORMING AN INTEGRATED CIRCUIT
|
|
Assignee
|
|
|
60 WOODLANDS INDUSTRIAL PARK D, STREET 2 |
SINGAPORE, SINGAPORE 738406 |
|
Correspondence name and address
|
|
WAGNER MURABITO & HAO LLP
|
|
123 WESTRIDGE DRIVE
|
|
WATSONVILLE, CA 95076
|
Search Results as of:
05/08/2024 05:45 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|