Patent Assignment Details
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| Reel/Frame: | 018380/0292 | |
| Pages: | 2 |
| | Recorded: | 10/04/2006 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11542226
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Filing Dt:
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10/04/2006
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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Semiconductor integrated circuit and correcting method of the same
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Assignee
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| 1-1-1, SHIBAURA |
| MINATO-KU, TOKYO, JAPAN |
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Correspondence name and address
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JOSEPH M. POTENZA
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BANNER & WITCOFF, LTD.
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1001 G STREET, N.W., SUITE 1100
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WASHINGTON, D.C. 20001-4597
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