Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 018385/0030 | |
| Pages: | 3 |
| | Recorded: | 10/04/2006 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
8
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
09563160
|
Filing Dt:
|
05/01/2000
|
|
Title:
|
Semiconductor device and timing control circuit
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2001
|
Application #:
|
09640670
|
Filing Dt:
|
08/18/2000
|
|
Title:
|
Semiconductor device and timing control circuit
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2002
|
Application #:
|
09656477
|
Filing Dt:
|
09/06/2000
|
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPED IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10226019
|
Filing Dt:
|
08/23/2002
|
|
Title:
|
SEMICONDUCTOR DEVICE AND TIMING CONTROL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10309180
|
Filing Dt:
|
12/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMEORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPED IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
10938794
|
Filing Dt:
|
09/13/2004
|
|
Publication #:
|
|
Pub Dt:
|
02/10/2005
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY(DRAM) CAPABLE OF CANCELING OUT COMPLIMENTARY NOISE DEVELOPED IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11198357
|
Filing Dt:
|
08/08/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPMENT IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11270608
|
Filing Dt:
|
11/10/2005
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE
|
|
|
Assignee
|
|
|
|
|
| 2-1, YAESU 2-CHOME |
| CHUO-KU, TOKYO, JAPAN |
|
|
Correspondence name and address
|
| |
STANLEY P. FISHER
|
| |
REED SMITH LLP
|
| |
3110 FAIRVIEW PARK DR.
|
| |
SUITE 1400
|
| |
FALLS CHURCH, VA 22042
|
Search Results as of:
05/08/2024 05:45 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
