Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 018597/0200 | |
| Pages: | 3 |
| | Recorded: | 11/24/2006 | | |
| Attorney Dkt #: | 1431.10206G00 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09964628
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/04/2002
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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10050561
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Filing Dt:
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01/18/2002
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Publication #:
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Pub Dt:
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09/05/2002
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Title:
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SENSE AMPLIFIERS HAVING REDUCED VTH DEVIATION
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10207234
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Filing Dt:
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07/30/2002
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Publication #:
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Pub Dt:
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02/27/2003
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Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10223317
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Filing Dt:
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08/20/2002
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Publication #:
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Pub Dt:
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02/27/2003
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Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10978469
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Filing Dt:
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11/02/2004
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Publication #:
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Pub Dt:
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04/28/2005
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Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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Assignee
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| 2-1, YAESU 2-CHOME, CHUO-KU |
| TOKYO, JAPAN |
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Correspondence name and address
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ANTONELLI, TERRY, STOUT & KRAUS, LLP
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1300 NORTH 17TH STREET-SUITE 1800
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ARLINGTON, VA 22209
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