Total properties:
595
Page
3
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6
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1 2 3 4 5 6
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Patent #:
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Issue Dt:
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07/27/1999
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Application #:
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08611784
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Filing Dt:
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03/06/1996
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Title:
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PCI BUS MASTER WITH CASCADED PCI ARBITRATION
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08618190
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Filing Dt:
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03/19/1996
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Title:
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METHOD AND APPARATUS FOR EFFECTING A SOFT RESET IN A PROCESSOR DEVICE WITHOUT REQUIRING A DEDICATED EXTERNAL PIN
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Patent #:
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Issue Dt:
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11/10/1998
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Application #:
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08621594
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Filing Dt:
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03/26/1996
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Title:
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VERSATILE CONNECTION OF A FIRST KEYBOARD/MOUSE INTERFACE AND A SECOND KEYBOARD/MOUSE INTERFACE TO A HOST COMPUTER
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Patent #:
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Issue Dt:
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03/24/1998
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Application #:
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08625742
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Filing Dt:
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03/29/1996
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Title:
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FLUORINE RESIDUE REMOVAL AFTER TUNGSTEN ETCHBACK
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08627986
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Filing Dt:
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04/08/1996
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Title:
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A SYSTEM USING DMA AND DESCRIPTOR FOR IMPLEMENTING PERIPHERAL DEVICE BUS MASTERING VIA A UNIVERSAL SERIAL BUS CONTROLLER OR AN INFRARED DATA ASSOCIATION CONTROLLER
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Patent #:
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Issue Dt:
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12/01/1998
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Application #:
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08627992
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Filing Dt:
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04/08/1996
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Title:
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A SYSTEM USING DESCRIPTOR AND HAVING HARDWARE STATE MACHINE COUPLED TO DMA FOR IMPLEMENTING PERIPHERAL DEVICE BUS MASTERING VIA USB CONTROLLER OR IRDA CONTROLLER
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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08629015
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Filing Dt:
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04/08/1996
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Title:
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METHOD AND SYSTEM FOR HOT DOCKING A PORTABLE COMPUTER TO A DOCKING STATION VIA THE PRIMARY PCI BUS
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08631264
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Filing Dt:
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04/12/1996
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Title:
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ZERO-RUN-LENGTH ENCODER WITH SHIFT REGISTER
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Patent #:
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Issue Dt:
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11/10/1998
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Application #:
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08632611
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Filing Dt:
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04/15/1996
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Title:
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MULTI-CYCLE NON-PARALLEL DATA ENCRYPTION ENGINE
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Patent #:
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|
Issue Dt:
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09/23/1997
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Application #:
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08633156
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Filing Dt:
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04/16/1996
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Title:
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DATA ENCRYPTOR HAVING A SCALABLE CLOCK
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Patent #:
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Issue Dt:
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08/25/1998
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Application #:
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08634794
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Filing Dt:
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04/19/1996
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Title:
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SYSTEM AND METHOD FOR STARTING AND MAINTAINING A CENTRAL PROCESSING UNIT (CPU) CLOCK USING CLOCK DIVISION EMULATION (CDE) DURING BREAK EVENTS
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Patent #:
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Issue Dt:
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04/08/1997
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Application #:
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08636552
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Filing Dt:
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04/23/1996
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Title:
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METHOD OF MAKING CMOS OUTPUT BUFFER WITH ENHANCED ESD RESISTANCE
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Patent #:
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|
Issue Dt:
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03/03/1998
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Application #:
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08643350
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Filing Dt:
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05/06/1996
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Title:
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SYSTEM AND METHOD FOR AUTOMATICALLY ENABLING AND DISABLING A PREFETCHING CAPABILITIY
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|
|
Patent #:
|
|
Issue Dt:
|
03/18/1997
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Application #:
|
08643755
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Filing Dt:
|
05/06/1996
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Title:
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INVERTER AMPLIFIER CIRCUITS
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|
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Patent #:
|
|
Issue Dt:
|
12/30/1997
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Application #:
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08643759
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Filing Dt:
|
05/06/1996
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Title:
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CURRENT LIMITED CROSS-COUPLED OSCILLATORS
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Patent #:
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Issue Dt:
|
11/03/1998
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Application #:
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08643894
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Filing Dt:
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05/07/1996
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Title:
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LOW VOLTAGE DIGITAL-TO-ANALOG CONVERTER
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Patent #:
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Issue Dt:
|
11/24/1998
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Application #:
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08647774
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Filing Dt:
|
05/15/1996
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Title:
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EFFICIENT SOFT RESET IN A PERSONAL COMPUTER
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Patent #:
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Issue Dt:
|
08/11/1998
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Application #:
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08652780
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Filing Dt:
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05/23/1996
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Title:
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TIMING METHOD AND APPARATUS FOR INTERLEAVING PIO AND DMA DATA TRANSFERS
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Patent #:
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|
Issue Dt:
|
04/21/1998
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Application #:
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08652955
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Filing Dt:
|
05/24/1996
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Title:
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SYSTEM USING A DIGITAL TIMER FOR A JOYSTICK POTENTIOMETER READOUT
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|
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Patent #:
|
|
Issue Dt:
|
02/18/1997
|
Application #:
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08653010
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Filing Dt:
|
05/24/1996
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Title:
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ARITHMETIC LOGIC UNIT WITH ZERO-RESULT PREDICTION
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|
|
Patent #:
|
|
Issue Dt:
|
01/20/1998
|
Application #:
|
08653255
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Filing Dt:
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05/24/1996
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Title:
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SYSTEM FOR DIGITALLY EMULATING THE ANALOG POSITION OF A PC GAME PORT JOYSTICK
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Patent #:
|
|
Issue Dt:
|
05/12/1998
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Application #:
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08653619
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Filing Dt:
|
05/24/1996
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Title:
|
SYSTEM AND METHOD FOR ENHANCING JOYSTICK PERFORMANCE
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Patent #:
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|
Issue Dt:
|
11/04/1997
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Application #:
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08654544
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Filing Dt:
|
05/29/1996
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Title:
|
SMALL SIGNAL AMPLIFIER FOR INDEPENDENT P-CHANNEL AND N-CHANNEL DRIVES
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08657826
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Filing Dt:
|
06/03/1996
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Title:
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SECURE MASS STORAGE SYSTEM FOR COMPUTERS
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Patent #:
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|
Issue Dt:
|
08/11/1998
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Application #:
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08664107
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Filing Dt:
|
06/13/1996
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Title:
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METHOD AND APPARATUS FOR ARBITRATING ACCESS TO MAIN MEMORY OF A COMPUTER SYSTEM
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Patent #:
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|
Issue Dt:
|
09/29/1998
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Application #:
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08670273
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Filing Dt:
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06/13/1996
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Title:
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METHOD AND APPARATUS FOR DIRECT ACCESS TO MAIN MEMORY BY AN I/O BUS
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08673950
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Filing Dt:
|
07/01/1996
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Title:
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PATTERNED FILLED LAYERS FOR INTEGRATED CIRCUIT MANUFACTURING
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Patent #:
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|
Issue Dt:
|
12/23/1997
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Application #:
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08677150
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Filing Dt:
|
07/09/1996
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Title:
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UNIVERSAL QFP TRAY TRANSFER METHOD
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Patent #:
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|
Issue Dt:
|
12/17/1996
|
Application #:
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08686272
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Filing Dt:
|
07/25/1996
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Title:
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METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN DIGITAL ELECTRONIC CIRCUITS
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|
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Patent #:
|
|
Issue Dt:
|
05/12/1998
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Application #:
|
08687242
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Filing Dt:
|
07/25/1996
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Title:
|
SYSTEM AND METHOD FOR ENABLING AND DISABLING WRITEBACK CACHE
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|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
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Application #:
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08687294
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Filing Dt:
|
07/25/1996
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Title:
|
FORMING A MOS TRANSISTOR WITH A RECESSED CHANNEL
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|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
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Application #:
|
08692476
|
Filing Dt:
|
08/06/1996
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Title:
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METHOD AND APPARATUS FOR ATTENUATING JITTER IN A DIGITAL TRANSMISSION LINE
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|
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Patent #:
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|
Issue Dt:
|
06/17/1997
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Application #:
|
08693853
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Filing Dt:
|
08/05/1996
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Title:
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LIMITED PROBES DEVICE TESTING FOR HIGH PIN COUNT DIGITAL DEVICES
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|
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Patent #:
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Issue Dt:
|
09/15/1998
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Application #:
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08693906
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Filing Dt:
|
08/05/1996
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Title:
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CLOCK CLAMPING CIRCUIT THAT PREVENTS CLOCK GLITCHING AND METHOD THEREFOR
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Patent #:
|
|
Issue Dt:
|
08/11/1998
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Application #:
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08697193
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Filing Dt:
|
08/21/1996
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Title:
|
CUSTOM LASER CONDUCTOR LINKAGE FOR INTEGRATED CIRCUITS
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|
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Patent #:
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|
Issue Dt:
|
08/18/1998
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Application #:
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08699492
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Filing Dt:
|
08/19/1996
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Title:
|
INTEGRATED CIRCUIT SCRIBE LINE STRUCTURES AND METHODS FOR MAKING SAME
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|
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Patent #:
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|
Issue Dt:
|
05/04/1999
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Application #:
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08699866
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Filing Dt:
|
08/20/1996
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Title:
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METHOD FOR MAKING DOPED ANTIFUSE STRUCTURES
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|
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Patent #:
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|
Issue Dt:
|
05/19/1998
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Application #:
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08699867
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Filing Dt:
|
08/20/1996
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Title:
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APPARATUS AND METHOD FOR PROGRAMMING ANTIFUSE STRUCTURES
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|
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Patent #:
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|
Issue Dt:
|
06/02/1998
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Application #:
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08703563
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Filing Dt:
|
08/27/1996
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Title:
|
DEADLOCK RESOLUTION METHODS AND APPARATUS FOR INTERFACING CONCURRENT AND ASYNCHRONOUS BUSES
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|
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Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08709479
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Filing Dt:
|
09/06/1996
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Title:
|
DUAL GATE OXIDE PROCESS WITH INCREASED RELIABILITY
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|
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Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08710779
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Filing Dt:
|
09/20/1996
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Title:
|
INTERRUPT BASED POSITIONING SYSTEM FOR JOYSTICKS AND METHOD THEREFOR
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|
|
Patent #:
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|
Issue Dt:
|
01/27/1998
|
Application #:
|
08712573
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Filing Dt:
|
09/12/1996
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Title:
|
METHOD FOR MAKING VIA STRUCTURE WITH METALLIC SPACER
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|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08715457
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Filing Dt:
|
09/18/1996
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Title:
|
BUFFER AND METHOD FOR TRANSFERRING DATA THEREIN
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|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08715807
|
Filing Dt:
|
09/19/1996
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Title:
|
PROCESS FOR MANUFACTURING A MULTI LAYER BUMPED SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08717529
|
Filing Dt:
|
09/17/1996
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Title:
|
WAVETABLE ADDRESS CACHE TO REDUCE ACCESSES OVER A PCI BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08718057
|
Filing Dt:
|
09/17/1996
|
Title:
|
MODULAR SCALABLE MULTI-PROCESSOR ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08718969
|
Filing Dt:
|
09/26/1996
|
Title:
|
SELECTIVE LATENCY REDUCTION IN BRIDGE CIRCUIT BETWEEN TWO BUSSES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
08718971
|
Filing Dt:
|
09/26/1996
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Title:
|
ARRANGEMENT AND METHOD FOR ALLOWING SEQUENCE-INDEPENDENT COMMAND RESPONSES ACROSS A COMPUTER BUS BRIDGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08719149
|
Filing Dt:
|
09/24/1996
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Title:
|
SCAN FLIP-FLOP AND METHODS FOR CONTROLLING THE ENTRY OF DATA THEREIN
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08719610
|
Filing Dt:
|
09/25/1996
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Title:
|
METHOD AND APPARATUS FOR EFFICIENTLY IMPLEMENTING COMPLEX FUNCTION BLOCKS IN INTEGRATED CIRCUIT DESIGNS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08719844
|
Filing Dt:
|
09/30/1996
|
Title:
|
WIRELESS SYSTEM FOR DIAGNOSING EXAMINATION AND PROGRAMMING OF VEHICULAR CONTROL SYSTEMS AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08721252
|
Filing Dt:
|
09/26/1996
|
Title:
|
ADDRESS/DATA QUEUING ARRANGEMENT AND METHOD FOR PROVIDING HIGH DATA THROUGH-PUT ACROSS BUS BRIDGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1998
|
Application #:
|
08723903
|
Filing Dt:
|
09/30/1996
|
Title:
|
METHOD FOR MAKING SHALLOW TRENCH ISOLATION STRUCTURE HAVING ROUNDED CORNERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08734501
|
Filing Dt:
|
10/21/1996
|
Title:
|
USE OF DUMMY UNDERLAYERS FOR IMPROVEMENT IN REMOVAL RATE CONSISTENCY DURING CHEMICAL MECHANICAL POLISHING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08740501
|
Filing Dt:
|
10/29/1996
|
Title:
|
MULTIPLE BUS AGENT INTEGRATED CIRCUIT DEVICE FOR CONNECTING TO AN EXTERNAL BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
08740758
|
Filing Dt:
|
11/01/1996
|
Title:
|
STAGGERED PAD ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08743992
|
Filing Dt:
|
11/05/1996
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Title:
|
NON-CONTIGUOUS MEMORY LOCATION ADDRESSING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08752724
|
Filing Dt:
|
11/19/1996
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Title:
|
KEYBOARD SCAN CODE TRANSLATION SYSTEM AND METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
|
08755202
|
Filing Dt:
|
11/22/1996
|
Title:
|
KEYBOARD CONTROLLER WITH INTEGRATED REAL TIME CLOCK FUNCTIONALITY AND METHOD THEREFOR
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|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08756900
|
Filing Dt:
|
12/02/1996
|
Title:
|
CMOS INPUT BUFFER WITH NMOS GATE COUPLED TO VSS THROUGH UNDOPED GATE POLY RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08757151
|
Filing Dt:
|
11/27/1996
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Title:
|
MULTIPLE NATIVE INSTRUCTION SET MASTER/SLAVE PROCESSOR ARANGEMENT AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08757430
|
Filing Dt:
|
11/27/1996
|
Title:
|
CIRCUIT ARRANGEMENT FOR TRANSLATING PLATFORM-INDEPENDENT INSTRUCTIONS FOR EXECUTION ON A HARDWARE PLATFORM AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08757592
|
Filing Dt:
|
11/27/1996
|
Title:
|
STACK CACHE FOR STACK-BASED PROCESSOR AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
08759711
|
Filing Dt:
|
12/06/1996
|
Title:
|
SYSTEM TO FIX POST-LAYOUT TIMING AND DESIGN RULES VIOLATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/1999
|
Application #:
|
08760701
|
Filing Dt:
|
12/05/1996
|
Title:
|
METHOD AND SYSTEM FOR AN EXTENSIBLE ON SILICON BUS SUPPORTING MULTIPLE FUNCTIONAL BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1998
|
Application #:
|
08762411
|
Filing Dt:
|
12/09/1996
|
Title:
|
A LOW VOLTAGE CMOS PROCESS WITH INDIVIDUALLY ADJUSTABLE LDD SPACERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
08763315
|
Filing Dt:
|
12/10/1996
|
Title:
|
CIRCUIT ARRANGEMENT AND METHOD FOR ASYNCHRONOUS CONTROL OF LOGIC CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08767780
|
Filing Dt:
|
12/17/1996
|
Title:
|
DETERMINING MAXIMUM LOAD INDEX FOR TABULAR TIMING MODELS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
|
Application #:
|
08768043
|
Filing Dt:
|
12/17/1996
|
Title:
|
CONDITIONING RING FOR USE IN A CHEMICAL MECHANICAL POLISHING MACHINE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08768966
|
Filing Dt:
|
12/18/1996
|
Title:
|
CHIP ON BOARD PACKAGE WITH TOP AND BOTTOM TERMINALS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
08770623
|
Filing Dt:
|
12/19/1996
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Title:
|
BARREL SHIFTER, CIRCUIT AND METHOD OF MANIPULATING A BIT PATTERN
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|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
08770624
|
Filing Dt:
|
12/19/1996
|
Title:
|
BARREL SHIFTER, CIRCUIT AND METHOD OF MANIPULATING A BIT PATTERN
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|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08774036
|
Filing Dt:
|
12/27/1996
|
Title:
|
METHOD FOR BI-LAYER PROGRAMMABLE RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08775629
|
Filing Dt:
|
12/31/1996
|
Title:
|
MICROPROCESSOR POWER CONTROL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08778300
|
Filing Dt:
|
01/02/1997
|
Title:
|
APPARATUS AND METHOD FOR EXTRACTING CAPACITANCE IN THE PRESENCE OF TWO GROUND PLANES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/1998
|
Application #:
|
08781129
|
Filing Dt:
|
01/09/1997
|
Title:
|
ENHANCED VOLTAGE TRACKING CIRCUIT FOR HIGH VOLTAGE TOLERANT BUFFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08782639
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Filing Dt:
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01/14/1997
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Title:
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PIPELINED ANALOG TO DIGITAL CONVERTERS AND INTERSTAGE AMPLIFIERS FOR SUCH CONVERTERS
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08783312
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Filing Dt:
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01/16/1997
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Title:
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SOFT EDGE INDUCED LOCAL OXIDATION OF SILICON
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Patent #:
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Issue Dt:
|
08/03/1999
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Application #:
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08787768
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Filing Dt:
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01/28/1997
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Title:
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OUTPUT DRIVER WITH CONSTANT SOURCE IMPEDANCE
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Patent #:
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Issue Dt:
|
10/20/1998
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Application #:
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08790303
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Filing Dt:
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01/31/1997
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Title:
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PCI BUS WITH REDUCED NUMBER OF SIGNALS
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Patent #:
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Issue Dt:
|
10/13/1998
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Application #:
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08792791
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Filing Dt:
|
02/03/1997
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Title:
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ANTIFUSE STRUCTURES
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Patent #:
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Issue Dt:
|
05/02/2000
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Application #:
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08794272
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Filing Dt:
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01/31/1997
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Title:
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FACE ON FACE FLIP CLIP INTEGRATION
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Patent #:
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Issue Dt:
|
10/03/2000
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Application #:
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08795098
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Filing Dt:
|
02/06/1997
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Title:
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ANTI-FUSE STRUCTURE FOR REDUCING CONTAMINATION OF THE ANTI-FUSE MATERIAL
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|
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Patent #:
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Issue Dt:
|
08/15/2000
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Application #:
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08799099
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Filing Dt:
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02/11/1997
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Title:
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INTELLIGENT POWER MANAGEMENT INTERFACE FOR COMPUTER SYSTEM HARDWARE
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Patent #:
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Issue Dt:
|
09/29/1998
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Application #:
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08802604
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Filing Dt:
|
02/19/1997
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Title:
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NON-VOLATILE DIGITAL CIRCUITS USING FERROELECTRIC CAPACITORS
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Patent #:
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Issue Dt:
|
12/22/1998
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Application #:
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08803180
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Filing Dt:
|
02/19/1997
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Title:
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METHOD FOR DRY ETCHING SIDEWALL POLYMER
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|
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Patent #:
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|
Issue Dt:
|
12/29/1998
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Application #:
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08803809
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Filing Dt:
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02/24/1997
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Title:
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DUMMY FILL PATTERNS TO IMPROVE INTERCONNECT PLANARITY
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|
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Patent #:
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|
Issue Dt:
|
08/10/1999
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Application #:
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08804342
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Filing Dt:
|
02/21/1997
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Title:
|
DATA COMMUNICATIONS WITH PROCESSOR-ASSERTABLE ADDRESSES MAPPED TO PERIPHERAL-ACCESSIBLE-ADDRESSES-TIMES-COMMAND PRODUCT SPACE
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|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
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Application #:
|
08805279
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Filing Dt:
|
02/25/1997
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Title:
|
METHODS OF GENERATING A DATA STREAM, METHODS OF VALIDATING AN INTEGRATED CIRCUIT, AND METHODS OF COMMUNICATING A DATA STREAM
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|
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Patent #:
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|
Issue Dt:
|
04/11/2000
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Application #:
|
08807069
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Filing Dt:
|
02/27/1997
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Title:
|
IC INTERCONNECT FORMATION WITH CHEMICAL-MECHANICAL POLISHING AND SILICA ETCHING WITH SOLUTION OF NITRIC AND HYDROFLUORIC ACIDS
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|
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Patent #:
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|
Issue Dt:
|
06/22/1999
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Application #:
|
08808341
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Filing Dt:
|
02/28/1997
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Title:
|
SMART DEBUG INTERFACE CIRCUIT FOR EFFICIENTLY FOR DEBUGGING A SOFTWARE APPLICATION A PROGRAMMABLE DIGITAL PROCESSOR DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
06/06/2000
|
Application #:
|
08808548
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Filing Dt:
|
02/28/1997
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Title:
|
RADIO SIGNAL CONTROLLER RADIO COMMUNICATION DEVICE, RADIO COMMUNICATION SYSTEM AND METHODS OF CONTROLLING A RADIO
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|
|
Patent #:
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|
Issue Dt:
|
05/01/2001
|
Application #:
|
08813274
|
Filing Dt:
|
03/10/1997
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Title:
|
MICROPROCESSOR CONFIGURATION ARRANGEMENT FOR SELECTING AN EXTERNAL BUS WIDTH
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|
|
Patent #:
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|
Issue Dt:
|
07/20/1999
|
Application #:
|
08814568
|
Filing Dt:
|
03/10/1997
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Title:
|
A METHOD AND SYSTEM FOR EXTENDING INTENDING INTERRUPT SOURCES AND IMPLEMENTING HARDWARE BASED AND SOFTWARE BASED PRIORITIZATION OF INTERRUPTS FOR AN EMBEDDED PROCESSOR
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|
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Patent #:
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|
Issue Dt:
|
09/05/2000
|
Application #:
|
08816903
|
Filing Dt:
|
03/14/1997
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Title:
|
DYNAMIC OVER FREQUENCY DETECTION AND PROTECTION CIRCUITRY
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|
|
Patent #:
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|
Issue Dt:
|
06/15/1999
|
Application #:
|
08820409
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Filing Dt:
|
03/12/1997
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Title:
|
METHOD AND APPARATUS FOR CACHING DISCONTIGUOUS ADDRESS SPACES WITH SHORT CACHE TAGS
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|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
08823591
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Filing Dt:
|
03/25/1997
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Title:
|
DIGITAL PHASE SHIFTER
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|
|
Patent #:
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|
Issue Dt:
|
03/28/2006
|
Application #:
|
08824633
|
Filing Dt:
|
03/27/1997
|
Title:
|
CUSTOMIZED POLISHING PAD FOR SELECTIVE PROCESS PERFORMANCE DURING CHEMICAL MECHANICAL POLISHING
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|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08825661
|
Filing Dt:
|
04/03/1997
|
Title:
|
DIRECT MEMORY ACCESS CONTROLLER WITH FULL READ/WRITE CAPABILITY
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|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08837161
|
Filing Dt:
|
04/14/1997
|
Title:
|
SILICON CORNER ROUNDING IN SHALLOW TRENCH ISOLATION PROCESS
|
|