Total properties:
39
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Patent #:
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Issue Dt:
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04/05/1988
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Application #:
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07065450
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Filing Dt:
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06/23/1987
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Title:
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PROTECTION DEVICE UTILIZING ONE OR MORE SUBSURFACE DIODES AND ASSOCIATED METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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07/04/1989
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Application #:
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07086443
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Filing Dt:
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08/17/1987
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Title:
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SYSTEM FOR HIGH SPEED DIGITAL TRANSMISSION IN REPETITIVE NOISE ENVIRONMENT
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Patent #:
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Issue Dt:
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11/22/1988
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Application #:
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07104187
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Filing Dt:
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10/05/1987
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Title:
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METHOD OF FABRICATING FIELD-EFFECT TRANSISTOR UTILIZING IMPROVED GATE SIDEWALL SPACERS
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Patent #:
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Issue Dt:
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01/30/1990
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Application #:
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07127867
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Filing Dt:
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12/02/1987
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Title:
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COMPLEMENTARY VOLTAGE INTERPOLATION CIRCUIT WITH TRANSMISSION DELAY COMPENSATION
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Patent #:
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Issue Dt:
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04/16/1991
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Application #:
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07217536
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Filing Dt:
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07/11/1988
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Title:
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REACTIVE ION ETCHING OF SILICON WITH HYDROGEN BROMIDE
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Patent #:
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Issue Dt:
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11/05/1991
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Application #:
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07287582
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Filing Dt:
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12/16/1988
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Title:
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METHOD FOR MANUFACTURING A PLANAR ELECTRICAL INTERCONNECTION UTILIZING ISOTROPIC DEPOSITION OF CONDUCTIVE MATERIAL
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Patent #:
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Issue Dt:
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05/31/1994
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Application #:
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07400178
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Filing Dt:
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08/29/1989
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Title:
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METHOD OF SYNCHRONIZING PARALLEL PROCESSORS EMPLOYING CHANNELS AND COMPILING METHOD MINIMIZING CROSS-PROCESSOR DATA DEPENDENCIES
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Patent #:
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Issue Dt:
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04/09/1991
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Application #:
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07440456
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Filing Dt:
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11/20/1989
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Title:
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TRANSISTOR MANUFACTURING PROCESS USING THREE-STEP BASE DOPING
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Patent #:
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Issue Dt:
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11/09/1993
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Application #:
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07510336
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Filing Dt:
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04/17/1990
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Title:
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METHOD AND APPARATUS FOR PROVIDING SYNCHRONIZED DATA CACHE OPERATION FOR PROCESSORS IN A PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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07/23/1991
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Application #:
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07614043
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Filing Dt:
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11/09/1990
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Title:
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DYNAMICALLY CONFIGURABLE SIGNAL PROCESSOR AND PROCESSOR ARRANGEMENT
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Patent #:
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Issue Dt:
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05/05/1992
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Application #:
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07630140
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Filing Dt:
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12/19/1990
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Title:
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FORMATION OF COMPOSITE MONOSILICON/POLYSILICON LAYER USING REDUCED- TEMPERATURE TWO-STEP SILICON DEPOSITION
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Patent #:
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Issue Dt:
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12/24/1991
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Application #:
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07642655
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Filing Dt:
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12/03/1990
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Title:
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FIELD-PROGRAMMABLE LOGIC DEVICE WITH PROGRAMMABLE FOLDBACK TO CONTROL NUMBER OF LOGIC LEVELS
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Patent #:
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Issue Dt:
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09/29/1992
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Application #:
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07695490
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Filing Dt:
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05/03/1991
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Title:
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POWER INTEGRATED CIRCUIT HAVING REVERSE-VOLTAGE PROTECTION
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Patent #:
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Issue Dt:
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01/12/1993
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Application #:
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07700279
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Filing Dt:
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05/15/1991
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Title:
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COMPANDOR SYSTEM WITH STABLE AND WIDELY ADJUSTABLE UNITY GAIN LEVEL
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Patent #:
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|
Issue Dt:
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06/13/1995
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Application #:
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07700663
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Filing Dt:
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05/15/1991
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Title:
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PROTECTED PROGRAMMABLE TRANSISTOR WITH REDUCED PARASITIC CAPACITANCES AND METHOD OF FABRICATION
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Patent #:
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|
Issue Dt:
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04/21/1992
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Application #:
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07715035
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Filing Dt:
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06/11/1991
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Title:
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SYSTEM FOR PARTITIONING AND TESTING SUBMODULE CIRCUITS OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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09/21/1993
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Application #:
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07811554
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Filing Dt:
|
12/20/1991
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Title:
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METHOD FOR MAKING AN IMPROVED HIGH VOLTAGE THIN FILM TRANSISTOR HAVING A LINEAR DOPING PROFILE
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Patent #:
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Issue Dt:
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12/07/1993
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Application #:
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07842853
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Filing Dt:
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02/25/1992
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Title:
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VERTICAL POWER MOS DEVICE WITH INCREASED RUGGEDNESS AND METHOD OF FABRICATION
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Patent #:
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|
Issue Dt:
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10/05/1993
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Application #:
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07863551
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Filing Dt:
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07/01/1991
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Title:
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DIFFERENTIAL INPUT BUFFER-INVERTERS AND GATES
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Patent #:
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Issue Dt:
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08/29/1995
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Application #:
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07971382
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Filing Dt:
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11/04/1992
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Title:
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SEMICONDUCTOR DEVICE CONFIGURATION WITH MULTIPLE HV-LDMOS TRANSISTORS AND A FLOATING WELL CIRCUIT
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Patent #:
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Issue Dt:
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04/05/1994
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Application #:
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08015061
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Filing Dt:
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02/08/1993
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Title:
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HIGH VOLTAGE THIN FILM TRANSISTOR HAVING A LINEAR DOPING PROFILE AND METHOD FOR MAKING
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|
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Patent #:
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|
Issue Dt:
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12/23/1997
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Application #:
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08063845
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Filing Dt:
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05/19/1993
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Title:
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INSTRUCTION CACHE SYSTEM FOR IMPLEMENTING PROGRAMS HAVING NON- SEQUENTIAL INSTRUCTIONS AND METHOD OF IMPLEMENTING SAME
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Patent #:
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|
Issue Dt:
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12/03/1996
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Application #:
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08066957
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Filing Dt:
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05/24/1993
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Title:
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ANALOG AUTONOMOUS TEST BUS FRAMEWORK FOR TESTING INTEGRATED CIRCUITS ON A PRINTED CIRCUIT BOARD
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|
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Patent #:
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|
Issue Dt:
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12/20/1994
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Application #:
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08072802
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Filing Dt:
|
06/07/1993
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Title:
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VERTICAL POWER MOS DEVICE WITH INCREASED RUGGEDNESS AND METHOD OF FABRICATION
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|
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Patent #:
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|
Issue Dt:
|
05/02/1995
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Application #:
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08101164
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Filing Dt:
|
08/03/1993
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Title:
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METHOD FOR MAKING AN IMPROVED HIGH VOLTAGE THIN FILM TRANSISTOR HAVING A LINEAR DOPING PROFILE
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|
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Patent #:
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|
Issue Dt:
|
08/04/1998
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Application #:
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08327123
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Filing Dt:
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10/21/1994
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Title:
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BI-DIRECTIONAL SIGNAL TRANSMISSION SYSTEM AND ADAPTER FOR SUCH A SYSTEM
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|
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Patent #:
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|
Issue Dt:
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01/23/1996
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Application #:
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08330645
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Filing Dt:
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10/28/1994
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Title:
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METHOD OF FABRICATION OF PROTECTED PROGRAMMABLE TRANSISTOR WITH REDUCED PARASITIC CAPACITANCES
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|
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Patent #:
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|
Issue Dt:
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02/10/1998
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Application #:
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08407535
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Filing Dt:
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03/20/1995
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Title:
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ANALOG AUTONOMOUS TEST BUS FRAMEWORK FOR TESTING INTEGRATED CIRCUITS ON A PRINTED CIRCUIT BOARD
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|
|
Patent #:
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|
Issue Dt:
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01/06/1998
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Application #:
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08447369
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Filing Dt:
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05/23/1995
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Title:
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ANALOG AUTONOMOUS TEST BUS FRAMEWORK FOR TESTING INTEGRATED CIRCUITS ON A PRINTED CIRCUIT BOARD
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|
|
Patent #:
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|
Issue Dt:
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06/16/1998
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Application #:
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08448268
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Filing Dt:
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05/23/1995
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Title:
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HIGH VOLTAGE THIN FILM TRANSISTOR HAVING A LINEAR DOPING PROFILE
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|
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Patent #:
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|
Issue Dt:
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07/15/1997
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Application #:
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08571486
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Filing Dt:
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12/13/1995
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Title:
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LATERAL THIN-FILM SOI DEVICES WITH LINEARLY-GRADED FIELD OXIDE AND LINEAR DOPING PROFILE
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|
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Patent #:
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|
Issue Dt:
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03/24/1998
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Application #:
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08695469
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Filing Dt:
|
08/12/1996
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Title:
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ANALOG AUTONOMOUS TEST BUS FRAMEWORK FOR TESTING INTEGRATED CIRCUITS ON A PRINTED CIRCUIT BOARD
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Patent #:
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|
Issue Dt:
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01/19/1999
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Application #:
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08715060
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Filing Dt:
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09/17/1996
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Title:
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WRITE CONTROL UNIT
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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08752827
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Filing Dt:
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11/20/1996
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Title:
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SYSTEM FOR PARTITIONING AND TESTING SUBMODULE CIRCUITS OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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08810003
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Filing Dt:
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03/03/1997
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Title:
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VLIW PROCESSOR WITH LESS INSTRUCTION ISSUE SLOTS THAN FUNCTIONAL UNITS
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08839731
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Filing Dt:
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04/15/1997
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Title:
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SYNCHRONIZING PARALLEL PROCESSORS USING BARRIERS EXTENDING OVER SPECIFIC MULTIPLE-INSTRUCTION REGIONS IN EACH INSTRUCTION STREAM
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Patent #:
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Issue Dt:
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01/04/2000
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Application #:
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08994876
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Filing Dt:
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12/19/1997
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Title:
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ANALOG AUTONOMOUS TEST BUS FRAMEWORK FOR TESTING INTEGRATED CIRCUITS ON A PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09090038
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Filing Dt:
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06/10/1998
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Title:
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VLIW PROCESSOR WITH WRITE CONTROL UNIT FOR ALLOWING LESS WRITE BUSES THAN FUNCTIONAL UNITS
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|
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Patent #:
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|
Issue Dt:
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09/19/2000
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Application #:
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09271202
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Filing Dt:
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03/17/1999
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Title:
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VLIW PROCESSOR WITH LESS INSTRUCTION ISSUE SLOTS THATN FUNCTIONAL UNITS
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