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Patent #:
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Issue Dt:
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07/26/1988
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Application #:
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07053071
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Filing Dt:
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05/21/1987
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Title:
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SYNCHRONOUS LOGIC ARRAY CIRCUIT WITH DUMMY SIGNAL LINES FOR CONTROLLING AND ARRAY OUTPUT
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Patent #:
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Issue Dt:
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07/04/1989
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Application #:
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07103841
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Filing Dt:
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10/01/1987
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Title:
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VOLTAGE LEVEL SHIFTING CIRCUIT
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Patent #:
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Issue Dt:
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08/15/1989
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Application #:
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07245930
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Filing Dt:
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09/14/1988
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Title:
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COMPARATOR ARRAY LOGIC
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Patent #:
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Issue Dt:
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07/21/1992
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Application #:
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07297112
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Filing Dt:
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01/13/1989
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Title:
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TECHNIQUE FOR PLACEMENT OF PIPELINING STAGES IN MULTI-STAGE DATAPATH ELEMENTS WITH AN AUTOMATED CIRCUIT DESIGN SYSTEM
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Patent #:
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Issue Dt:
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01/25/1994
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Application #:
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07356023
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Filing Dt:
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05/23/1989
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Title:
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METHOD AND APPARATUS FOR THE DESIGN AND FABRICATION OF INTEGRATED CIRCUITS EMPLOYING LOGIC DECOMPOSITION ALGORITHMS FOR THE TIMING OPTIMIZATION OF MULTILEVEL LOGIC
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Patent #:
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Issue Dt:
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01/15/1991
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Application #:
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07370542
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Filing Dt:
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06/23/1989
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Title:
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STATIC RANDOM ACCESS MEMORY HAVING COLUMN DECODED BIT LINE BIAS
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Patent #:
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Issue Dt:
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07/23/1991
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Application #:
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07422256
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Filing Dt:
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10/16/1989
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Title:
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SIGNATURE INDICATING CIRCUIT
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Patent #:
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Issue Dt:
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05/12/1992
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Application #:
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07422332
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Filing Dt:
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10/16/1989
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Title:
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METHOD FOR LABELLING POLYGONS
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Patent #:
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Issue Dt:
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10/27/1992
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Application #:
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07466158
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Filing Dt:
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01/17/1990
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Title:
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INPUT PROTECTION CIRCUIT FOR CMOS DEVICES
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Patent #:
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Issue Dt:
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10/15/1991
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Application #:
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07476089
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Filing Dt:
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03/05/1990
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Title:
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CHARGE NEUTRALIZATION USING SILICON-ENRICHED OXIDE LAYER
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Patent #:
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Issue Dt:
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10/08/1991
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Application #:
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07523443
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Filing Dt:
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05/14/1990
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Title:
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SYSTEM FOR ACHIEVING DESIRED BONDLENGTH OF ADHESIVE BETWEEN A SEMICONDUCTOR CHIP PACKAGE AND A HEATSINK
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Patent #:
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Issue Dt:
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10/25/1994
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Application #:
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07523448
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Filing Dt:
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05/14/1990
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Title:
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AUTOMATIC SYNTHESIS OF INTEGRATED CIRCUITS EMPLOYING CONTROLLED INPUT DEPENDENCY DURING A DECOMPOSITION PROCESS
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Patent #:
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Issue Dt:
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12/28/1993
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Application #:
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07583732
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Filing Dt:
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09/14/1990
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Title:
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UNIVERSAL KEYBOARD AND KEYBOARD/SPATIAL INPUT DEVICE CONTROLLER
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Patent #:
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Issue Dt:
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09/20/1994
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Application #:
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07592709
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Filing Dt:
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10/04/1990
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Title:
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SYSTEM FOR SECURING AND ELECTRICALLY CONNECTING A SEMICONDUCTOR CHIP TO A SUBSTRATE
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Patent #:
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Issue Dt:
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06/23/1992
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Application #:
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07609307
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Filing Dt:
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11/01/1990
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Title:
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BIT-SERIAL MULTIPLIERS HAVING LOW LATENCY AND HIGH THROUGHPUT
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Patent #:
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Issue Dt:
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05/03/1994
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Application #:
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07626819
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Filing Dt:
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12/13/1990
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Title:
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METHOD FOR PLACEMENT OF CONNECTORS USED INTERCONNECTING CIRCUIT COMPONENTS IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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07/28/1992
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Application #:
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07629529
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Filing Dt:
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12/18/1990
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Title:
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AUTOMATIC PIN CIRCUITRY SHUTOFF FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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05/05/1992
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Application #:
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07629530
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Filing Dt:
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12/18/1990
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Title:
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DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERTERS
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Patent #:
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Issue Dt:
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04/13/1993
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Application #:
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07630284
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Filing Dt:
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12/19/1990
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Title:
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METHOD FOR PARTITIONING OF CONNECTED CIRCUIT COMPONENTS BEFORE PLACEMENT IN ONE OR MORE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/09/1993
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Application #:
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07631618
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Filing Dt:
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12/21/1990
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Title:
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HIDDEN REFRESH OF A DYNAMIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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09/14/1993
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Application #:
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07632765
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Filing Dt:
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12/20/1990
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Title:
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METHOD AND APPARATUS FOR COMPENSATING FOR BIT LINE DELAYS IN SEMICONDUCTOR MEMORIES
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Patent #:
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Issue Dt:
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12/21/1993
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Application #:
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07632895
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Filing Dt:
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12/24/1990
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Title:
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CIRCUIT SIMULATION SYSTEM WITH WAKE-UP LATENCY
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Patent #:
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Issue Dt:
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04/27/1993
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Application #:
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07650512
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Filing Dt:
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02/05/1991
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Title:
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METHOD AND APPARATUS FOR PROVIDING OUTPUT CONTENTION RELIEF FOR DIGITAL BUFFERS
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Patent #:
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Issue Dt:
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08/04/1992
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Application #:
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07655018
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Filing Dt:
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02/12/1991
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Title:
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VARIABLE FREQUENCY CLOCK FOR A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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04/05/1994
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Application #:
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07659796
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Filing Dt:
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02/22/1991
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Title:
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PAGE MODE COMPARATOR DECODE LOGIC FOR VARIABLE SIZE DRAM TYPES AND DIFFERENT INTERLEAVE OPTIONS
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Patent #:
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Issue Dt:
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06/09/1992
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Application #:
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07665377
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Filing Dt:
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03/05/1991
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Title:
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CMOS DELAY CIRCUIT WITH CONTROLLABLE DELAY
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Patent #:
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Issue Dt:
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05/05/1992
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Application #:
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07665385
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Filing Dt:
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03/05/1991
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Title:
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REDUCED SWITCHING NOISE OUTPUT BUFFER USING DIODE FOR QUICK TURN-OFF
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Patent #:
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Issue Dt:
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05/18/1993
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Application #:
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07680004
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Filing Dt:
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04/01/1991
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Title:
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AN AUTOMATED METHOD OF INSERTING PIPELINE STAGES IN A DATA PATH ELEMENT TO ACHIEVE A SPECIFIED OPERATION FREQUENCY
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Patent #:
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Issue Dt:
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06/30/1992
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Application #:
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07696310
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Filing Dt:
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04/29/1991
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Title:
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CONDITIONAL-SUM CARRY STRUCTURE COMPILER
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Patent #:
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Issue Dt:
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07/27/1993
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Application #:
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07710838
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Filing Dt:
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06/03/1991
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Title:
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DIGITAL OUTPUT BUFFER AND METHOD WITH SLEW RATE CONTROL AND REDUCED CROWBAR CURRENT
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Patent #:
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Issue Dt:
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12/22/1992
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Application #:
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07718524
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Filing Dt:
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06/21/1991
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Title:
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METHOD OF PROVIDING POWER TO AN INTERGRATED CIRCUIT
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Patent #:
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Issue Dt:
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09/22/1992
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Application #:
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07722586
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Filing Dt:
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06/27/1991
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Title:
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INTERBLOCK DISPERSED-WORD MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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10/25/1994
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Application #:
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07747541
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Filing Dt:
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08/20/1991
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Title:
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METHOD FOR REGULAR PLACEMENT OF DATA PATH COMPONENTS IN VLSI CIRCUITS
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Patent #:
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Issue Dt:
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04/06/1993
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Application #:
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07765597
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Filing Dt:
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09/26/1991
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Title:
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SYSTEM FOR ACHIEVING DESIRED BONDLENGTH OF ADHESIVE BETWEEN A SEMICONDUCTOR CHIP PACKAGE AND A HEATSINK
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Patent #:
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Issue Dt:
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04/06/1993
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Application #:
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07767171
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Filing Dt:
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09/27/1991
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Title:
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EXPOSED DIE-ATTACH HEATSINK PACKAGE
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Patent #:
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Issue Dt:
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12/20/1994
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Application #:
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07775085
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Filing Dt:
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10/11/1991
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Title:
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STRUCTURE FOR SUPPRESSION OF FIELD INVERSION CAUSED BY CHARGE BUILD-UP IN THE DIELECTRIC
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Patent #:
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Issue Dt:
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07/07/1992
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Application #:
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07776503
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Filing Dt:
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10/11/1991
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Title:
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CHARGE NEUTRALIZATION USING SILICON-ENRICHED OXIDE LAYER
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Patent #:
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Issue Dt:
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06/29/1993
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Application #:
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07780677
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Filing Dt:
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10/29/1991
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Title:
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LOGIC LEVEL SHIFTER FOR 3 VOLT CMOS TO 5 VOLT CMOS OR TTL
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Patent #:
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Issue Dt:
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06/15/1993
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Application #:
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07783040
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Filing Dt:
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10/25/1991
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Title:
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INTEGRATED CIRCUIT MEMORY WITH NON-BINARY ARRAY CONFIGURATION
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Patent #:
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Issue Dt:
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03/15/1994
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Application #:
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07786322
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Filing Dt:
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10/31/1991
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Title:
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METHOD FOR MOISTURE SEALING INTEGRATED CIRCUITS USING SILICON NITRIDE SPACER PROTECTION OF OXIDE PASSIVATION EDGES
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Patent #:
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Issue Dt:
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12/14/1993
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Application #:
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07811092
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Filing Dt:
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12/20/1991
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Title:
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PHASE DETECTOR CIRCUIT
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Patent #:
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Issue Dt:
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04/27/1993
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Application #:
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07811406
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Filing Dt:
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12/20/1991
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Title:
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INTEGRATED CIRCUIT PACKAGE WITH DEVICE AND WIRE COAT ASSEMBLY
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Patent #:
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Issue Dt:
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12/15/1992
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Application #:
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07811755
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Filing Dt:
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12/20/1991
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Title:
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METHOD OF CONSTRUCTING TERMINATION ELECTRODES ON YIELDED SEMICONDUCTOR DIE BY VISIBLY ALIGNING THE DIE PADS THROUGH A TANSPARENT SUBSTRATE
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Patent #:
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Issue Dt:
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01/25/1994
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Application #:
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07836078
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Filing Dt:
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02/14/1992
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Title:
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COMPENSATED DIGITAL DELAY SEMICONDUCTOR DEVICE WITH SELECTABLE OUTPUT TAPS AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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10/05/1993
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Application #:
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07838625
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Filing Dt:
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02/19/1992
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Title:
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DOUBLE-EDGE TRIGGERED MEMORY DEVICE AND SYSTEM
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Patent #:
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Issue Dt:
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03/01/1994
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Application #:
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07839192
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Filing Dt:
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02/20/1992
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Title:
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SEQUENTIALLY ACCESSIBLE NON-VOLATILE CIRCUIT FOR STORING DATA
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Patent #:
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Issue Dt:
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10/11/1994
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Application #:
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07847517
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Filing Dt:
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03/06/1992
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Title:
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SYSTEM FOR CONTROLLING AN INTEGRATED PRODUCT PROCESS FOR SEMICONDUCTOR WAFERS AND PACKAGES
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Patent #:
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Issue Dt:
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09/20/1994
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Application #:
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07854486
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Filing Dt:
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03/20/1992
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Title:
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INTEGRATED CIRCUIT PACKAGE INCLUDING A HEAT PIPE
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Patent #:
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Issue Dt:
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09/07/1993
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Application #:
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07854527
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Filing Dt:
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03/20/1992
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Title:
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DUAL MODE PLASMA ETCHING SYSTEM AND METHOD OF PLASMA ENDPOINT DETECTION
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Patent #:
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Issue Dt:
|
03/01/1994
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Application #:
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07860370
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Filing Dt:
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03/30/1992
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Title:
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METHOD FOR SUPPRESSING CHARGE LOSS IN EEPROMS/EPROMS AND INSTABILITIES IN SRAM LOAD RESISTORS
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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07860810
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Filing Dt:
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03/31/1992
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Title:
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LEADFRAME HAVING ONE OR MORE POWER/GROUND PLANES WITHOUT VIAS
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Patent #:
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Issue Dt:
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08/02/1994
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Application #:
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07861403
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Filing Dt:
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03/31/1992
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Title:
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COMPUTER DISPLAY SYSTEM USING SYSTEM MEMORY IN PLACE OR DEDICATED DISPLAY MEMORY AND METHOD THEREFOR
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Patent #:
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Issue Dt:
|
01/03/1995
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Application #:
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07893616
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Filing Dt:
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06/05/1992
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|
Title:
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PLANARIZATION
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Patent #:
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Issue Dt:
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08/30/1994
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Application #:
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07902183
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Filing Dt:
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06/22/1992
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Title:
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GATE ARRAY BASES WTIH FLEXIBLE ROUTING
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Patent #:
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Issue Dt:
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03/15/1994
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Application #:
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07918815
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Filing Dt:
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07/22/1992
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Title:
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RAPID THERMAL OXIDATION OF SILICON IN AN OZONE AMBIENT
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Patent #:
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Issue Dt:
|
12/06/1994
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Application #:
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07918816
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Filing Dt:
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07/22/1992
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Title:
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PACKAGE STRUCTURE AND METHOD FOR REDUCING BOND WIRE INDUCTANCE
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Patent #:
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Issue Dt:
|
02/01/1994
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Application #:
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07931088
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Filing Dt:
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08/13/1992
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Title:
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LIQUID AGITATION AND PURIFICATION SYSTEM
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Patent #:
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Issue Dt:
|
12/24/1996
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Application #:
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07938727
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Filing Dt:
|
09/01/1992
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Title:
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METHOD OF MAKING FLASH MEMORY CELL
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Patent #:
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Issue Dt:
|
12/07/1993
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Application #:
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07939215
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Filing Dt:
|
09/02/1992
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Title:
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DETAPING MACHINE FOR REMOVAL OF INTEGRATED CIRCUIT DEVICES FROM SEALED POCKET TAPE
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Patent #:
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|
Issue Dt:
|
09/27/1994
|
Application #:
|
07943260
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Filing Dt:
|
09/10/1992
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|
Title:
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DESIGN AND SEALING METHOD FOR SEMICONDUCTOR PACKAGES
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Patent #:
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|
Issue Dt:
|
05/17/1994
|
Application #:
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07953032
|
Filing Dt:
|
09/25/1992
|
|
Title:
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GATE ARRAY BASES WITH FLEXIBLE ROUTING
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|
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Patent #:
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Issue Dt:
|
05/02/1995
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Application #:
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07959179
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Filing Dt:
|
10/09/1992
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|
Title:
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METHOD TO REDUCE TEST VECTORS/TEST TIME IN DEVICES USING EQUIVALENT BLOCKS
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Patent #:
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|
Issue Dt:
|
11/07/1995
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Application #:
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07965635
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Filing Dt:
|
10/23/1992
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Title:
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VERIFIABLE SECURITY CIRCUITRY FOR PREVENTING UNAUTHORIZED ACCESS TO PROGRAMMED READ ONLY MEMORY
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Patent #:
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Issue Dt:
|
03/29/1994
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Application #:
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07970601
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Filing Dt:
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10/28/1992
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Title:
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BEHAVIORAL SYNTHESIS OF CIRCUITS INCLUDING HIGH IMPEDANCE BUFFERS
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Patent #:
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Issue Dt:
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10/15/1996
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Application #:
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07974457
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Filing Dt:
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11/12/1992
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Title:
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PARAMETERIZED GENERIC MULTIPLIER COMPLIER
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Patent #:
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Issue Dt:
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09/17/1996
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Application #:
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07975014
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Filing Dt:
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11/12/1992
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Title:
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PARAMETERIZED GENERIC COMPILER
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Patent #:
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Issue Dt:
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12/14/1993
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Application #:
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07990329
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Filing Dt:
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12/10/1992
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Title:
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METAL PATTERNING WITH DECHLORINIZATION IN INTEGRATED CIRCUIT MANUFACTURE
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Patent #:
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Issue Dt:
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02/28/1995
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Application #:
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07991769
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Filing Dt:
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12/17/1992
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Title:
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CIRCUIT FOR ELIMINATING OFF-CHIP TO ON-CHIP CLOCK SKEW
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Patent #:
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Issue Dt:
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02/14/1995
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Application #:
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07992335
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Filing Dt:
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12/17/1992
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Title:
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CLOCK GENERATOR FOR PROVIDING A PAIR OF NONOVERLAPPING CLOCK SIGNALS WITH ADJUSTABLE SKEW
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Patent #:
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Issue Dt:
|
07/12/1994
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Application #:
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08011084
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Filing Dt:
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01/29/1993
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Title:
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METHOD FOR MAKING CUSP-FREE ANTI-FUSE STRUCTURES
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Patent #:
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Issue Dt:
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03/07/1995
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Application #:
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08016113
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Filing Dt:
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02/10/1993
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Title:
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AUTOMATED CIRCUIT DESIGN SYSTEM AND METHOD FOR REDUCING CRITICAL PATH DELAY TIMES
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Patent #:
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Issue Dt:
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09/30/1997
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Application #:
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08040685
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Filing Dt:
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03/31/1993
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Title:
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SELF-DEFINING INSTRUCTION SIZE
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Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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08040738
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Filing Dt:
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03/31/1993
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Title:
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AUTOMATED OPTIMIZATION OF HIERARCHICAL NETLISTS
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Patent #:
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Issue Dt:
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09/17/1996
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Application #:
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08042306
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Filing Dt:
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04/02/1993
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Title:
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CACHING FIFO AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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01/09/1996
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Application #:
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08048710
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Filing Dt:
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04/15/1993
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Title:
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METHOD FOR INCREASING CACHEABLE ADDRESS SPACE IN A SECOND LEVEL CACHE
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Patent #:
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Issue Dt:
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05/24/1994
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Application #:
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08052143
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Filing Dt:
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04/21/1993
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Title:
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INTEGRATED CIRCUIT MEMORY WITH NON-BINARY ARRAY CONFIGURATION
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Patent #:
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Issue Dt:
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08/30/1994
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Application #:
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08073843
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Filing Dt:
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06/07/1993
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Title:
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METHOD FOR FORMING LATERALLY GRADED DEPOSIT-TYPE EMITTER FOR BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08076876
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Filing Dt:
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06/11/1993
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Title:
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MULTIPLEX ADDRESS/DATA BUS WITH MULTIPLEX SYSTEM CONTROLLER AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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08/22/1995
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Application #:
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08081761
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Filing Dt:
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06/23/1993
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Title:
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METHOD AND STRUCTURE FOR CREATING A SELF-ALIGNED BICMOS-COMPATIBLE BIPOLAR TRANSISTOR WITH A LATERALLY GRADED EMITTER STRUCTURE
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Patent #:
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Issue Dt:
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03/21/1995
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Application #:
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08081993
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Filing Dt:
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06/23/1993
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Title:
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METHOD FOR SELF-ALIGNED PUNCHTHROUGH IMPLANT USING AN ETCH-BACK GATE
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Patent #:
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Issue Dt:
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01/10/1995
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Application #:
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08082119
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Filing Dt:
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06/23/1993
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Title:
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METHOD FOR REDUCING RESISTANCE AT INTERFACE OF SINGLE CRYSTAL SILICON AND DEPOSITED SILICON
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Patent #:
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Issue Dt:
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08/16/1994
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Application #:
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08082124
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Filing Dt:
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06/23/1993
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Title:
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AC DRAIN VOLTAGE CHARGING SOURCE FOR PROM DEVICES
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Patent #:
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Issue Dt:
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02/20/1996
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Application #:
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08086339
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Filing Dt:
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06/30/1993
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Title:
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STATUS REGISTER WITH ASYNCHRONOUS READ AND RESET AND METHOD FOR PROVIDING SAME
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Patent #:
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Issue Dt:
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05/14/1996
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Application #:
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08097417
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Filing Dt:
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07/23/1993
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Title:
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PAD STRUCTURE WITH PARASITIC MOS TRANSISTOR FOR USE WITH SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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05/30/1995
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Application #:
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08102638
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Filing Dt:
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08/05/1993
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Title:
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THIN CAVITY DOWN BALL GRID ARRAY PACKAGE BASED ON WIREBOND TECHNOLOGY
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Patent #:
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Issue Dt:
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03/14/1995
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Application #:
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08109728
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Filing Dt:
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08/20/1993
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Title:
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METHOD AND APPARATUS FOR PATTERNING A METAL LAYER
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Patent #:
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Issue Dt:
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12/26/1995
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Application #:
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08113574
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Filing Dt:
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08/27/1993
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Title:
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METHOD AND APPARATUS FOR ATTENUATING JITTER IN A DIGITAL TRANSMISSION LINE
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Patent #:
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Issue Dt:
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12/05/1995
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Application #:
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08120622
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Filing Dt:
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09/13/1993
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Title:
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SECURITY CIRCUITRY WITH SELECT LINE AND DATA LINE SHIELDING
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Patent #:
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Issue Dt:
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12/06/1994
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Application #:
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08126250
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Filing Dt:
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09/24/1993
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Title:
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HIGH PERFORMANCE PACKAGE USING HIGH DIELECTRIC CONSTANT MATERIALS FOR POWER/GROUND AND LOW DIELECTRIC CONSTANT MATERIALS FOR SIGNAL LINES
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Patent #:
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Issue Dt:
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05/09/1995
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Application #:
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08126288
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Filing Dt:
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09/24/1993
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Title:
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SEMI-CONDUCTOR DEVICE INTERCONNECT PACKAGE ASSEMBLY FOR IMPROVED PACKAGE PERFORMANCE
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Patent #:
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Issue Dt:
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05/02/1995
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Application #:
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08126353
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Filing Dt:
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09/24/1993
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Title:
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BARRIER ENHANCEMENT AT THE SALICIDE LAYER
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Patent #:
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Issue Dt:
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02/21/1995
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Application #:
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08126624
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Filing Dt:
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09/24/1993
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Title:
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METHOD OF MAKING A FIELD PROGRAMMABLE READ ONLY MEMROY (ROM) CELL USING AN AMORPHOUS SILICON FUSE WITH BURIED CONTACT POLYSILICON AND METAL ELECTRODES
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Patent #:
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Issue Dt:
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01/16/1996
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Application #:
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08127270
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Filing Dt:
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09/24/1993
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Title:
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VERSATILE RECONFIGURABLE MATRIX BASED BUILT-IN SELF-TEST PROCESSOR FOR MINIMIZING FAULT GRADING
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Patent #:
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Issue Dt:
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06/27/1995
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Application #:
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08138298
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Filing Dt:
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10/18/1993
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Title:
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METHOD FOR MAKING MULTI-LEVEL ANTIFUSE STRUCTURE
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Patent #:
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Issue Dt:
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12/20/1994
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Application #:
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08140736
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Filing Dt:
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10/21/1993
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Title:
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LIQUID AGITATION AND PURIFICATION SYSTEM
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Patent #:
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Issue Dt:
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03/28/1995
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Application #:
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08147465
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Filing Dt:
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10/29/1993
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Title:
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METHOD AND STRUCTURE FOR THE AUTOMATED DESIGN OF ANALOG INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/29/1997
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Application #:
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08148420
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Filing Dt:
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11/03/1993
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Title:
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AUTOMATIC OPTIMIZATION OF A COMPILED MEMORY STRUCTURE BASED ON USER SELECTED CRITERIA
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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08156156
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Filing Dt:
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11/23/1993
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Title:
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ASYMMETRIC ELECTRO-STATIC DISCHARGE TRANSISTORS FOR INCREASED ELECTRO-STATIC DISCHARGE HARDNESS
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Patent #:
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Issue Dt:
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09/12/1995
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Application #:
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08158968
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Filing Dt:
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11/30/1993
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Title:
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BUS INTERFACE WITH GRAPHICS AND SYSTEM PATHS FOR AN INTEGRATED MEMORY SYSTEM
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|
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Patent #:
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Issue Dt:
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09/26/1995
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Application #:
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08159186
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Filing Dt:
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11/30/1993
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Title:
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CACHE MEMORY SUPPORT IN AN INTEGRATED MEMORY SYSTEM
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