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Reel/Frame:018668/0255   Pages: 21
Recorded: 12/22/2006
Attorney Dkt #:E8280.0062.G007
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 595
Page 2 of 6
Pages: 1 2 3 4 5 6
1
Patent #:
Issue Dt:
11/11/1997
Application #:
08176353
Filing Dt:
12/30/1993
Title:
INTEGRATED CIRCUIT SCRIBE LINE STRUCTURES AND METHODS FOR MAKING SAME
2
Patent #:
Issue Dt:
12/12/1995
Application #:
08187960
Filing Dt:
01/28/1994
Title:
SERIAL BUS I/O SYSTEM AND METHOD FOR SERIALIZING INTERRUPT REQUESTS AND DMA REQUESTS IN A COMPUTER SYSTEM
3
Patent #:
Issue Dt:
02/11/1997
Application #:
08188373
Filing Dt:
01/27/1994
Title:
A SINGLE SHARED ROM FOR STORING KEYBOARD MICROCONTROLLER CODE PORTION AND CPU CODE PORTION AND DISABLING ACCESS TO A PORTION WHILE ACCESSING TO THE OTHER
4
Patent #:
Issue Dt:
04/04/1995
Application #:
08188505
Filing Dt:
01/28/1994
Title:
METHOD FOR CONFIGURING MULTIPLE IDENTICAL SERIAL I/O DEVICES TO UNIQUE ADDRESSES THROUGH A SERIAL BUS
5
Patent #:
Issue Dt:
09/19/1995
Application #:
08190419
Filing Dt:
02/02/1994
Title:
TAMPER PROTECTION CELL
6
Patent #:
Issue Dt:
09/05/1995
Application #:
08207444
Filing Dt:
03/07/1994
Title:
METHOD FOR PERFORMING WRITES OF NON-CONTIGUOUS BYTES ON A PCI BUS IN A MINIMUM NUMBER OF WRITE CYCLES
7
Patent #:
Issue Dt:
03/07/1995
Application #:
08221338
Filing Dt:
03/31/1994
Title:
MOSFET WITH GATE-PENETRATING HALO IMPLANT
8
Patent #:
Issue Dt:
04/25/1995
Application #:
08221740
Filing Dt:
03/31/1994
Title:
ANGLED LATERAL POCKET IMPLANTS ON P-TYPE SEMICONDUCTOR DEVICES
9
Patent #:
Issue Dt:
05/23/1995
Application #:
08222139
Filing Dt:
03/31/1994
Title:
SEMICONDUCTOR-ON-INSULATOR INTEGRATED CIRCUIT WITH SELECTIVELY THINNEDCHANNEL REGION
10
Patent #:
Issue Dt:
10/24/1995
Application #:
08241268
Filing Dt:
05/11/1994
Title:
EXTRACTION METHOD FOR AUTOMATED DETERMINATION OF SOURCE/DRAIN RESISTANCE
11
Patent #:
Issue Dt:
06/17/1997
Application #:
08257968
Filing Dt:
06/10/1994
Title:
BIT ERROR PERFORMANCE OF A FREQUENCY HOPPING, RADIO COMMUNICATION SYSTEM
12
Patent #:
Issue Dt:
02/13/1996
Application #:
08269798
Filing Dt:
06/30/1994
Title:
ADAPTABLE WAFER PROBE ASSEMBLY FOR TESTING ICS WITH DIFFERENT POWER/GROUND BOND PAD CONFIGURATIONS
13
Patent #:
Issue Dt:
11/21/1995
Application #:
08269804
Filing Dt:
06/30/1994
Title:
MULTI-LEVEL VROM PROGRAMMING METHOD AND CIRCUIT
14
Patent #:
Issue Dt:
02/13/1996
Application #:
08272205
Filing Dt:
07/08/1994
Title:
METHOD AND APPARATUS FOR SYNTHESIZING DATAPATHS FOR INTEGRATED CIRCUIT DESIGN AND FABRICATION
15
Patent #:
Issue Dt:
12/03/1996
Application #:
08274928
Filing Dt:
07/14/1994
Title:
CMOS INPUT BUFFER WITH NMOS GATE COUPLED TO VSS THROUGH UNDOPED GATE POLY RESISTOR
16
Patent #:
Issue Dt:
02/20/1996
Application #:
08275187
Filing Dt:
07/14/1994
Title:
AN ABTU-FUSE STRUCTURE FOR REDUCING CONTAMINATION OF THE ANTI-FUSE MATERIAL
17
Patent #:
Issue Dt:
06/09/1998
Application #:
08277090
Filing Dt:
07/19/1994
Title:
DEVICE RELIABILITY OF MOS DEVICES USING SILICON RICH PLASMA OXIDE FILMS
18
Patent #:
Issue Dt:
12/05/1995
Application #:
08286292
Filing Dt:
08/05/1994
Title:
METHOD AND APPARATUS FOR MINIMIZING POWER-UP CROWBAR CURRENT IN A RETARGETABLE SRAM MEMORRY SYSTEM
19
Patent #:
Issue Dt:
04/23/1996
Application #:
08286662
Filing Dt:
08/05/1994
Title:
METHOD FOR CONTROLLING THE OPERATION OF A COMPUTER IMPLEMENTED APPARATUS TO SELECTIVELY EXECUTE INSTRUCTIONS OF DIFFERENT BIT LENGHTS
20
Patent #:
Issue Dt:
04/02/1996
Application #:
08294783
Filing Dt:
08/24/1994
Title:
CMOS LOCOS ISOLATION FOR SELF-ALIGNED NPN BJT IN A BICMOS PROCESS
21
Patent #:
Issue Dt:
06/04/1996
Application #:
08298988
Filing Dt:
08/31/1994
Title:
MEMORY SUBSYSTEMS HAVING LOOK-AHEAD INSTRUCTION PREFETCH BUFFERS AND INTELLIGENT POSTED WRITE BUFFERS FOR INCREASING THE THROUGHPUT OF DIGITAL COMPUTER SYSTEMS
22
Patent #:
Issue Dt:
07/09/1996
Application #:
08298989
Filing Dt:
08/31/1994
Title:
DIGITAL COMPUTER SYSTEM HAVING AN IMPROVED DIRECT-MAPPED CACHE CONTROLLER (WITH FLAG MODIFICATION) FOR A CPU WITH ADDRES PIPELINING AND METHOD THEREFOR
23
Patent #:
Issue Dt:
02/03/1998
Application #:
08308328
Filing Dt:
09/19/1994
Title:
MULTI-MODE INFRARED INPUT/OUTPUT INTERFACE
24
Patent #:
Issue Dt:
02/20/1996
Application #:
08314425
Filing Dt:
09/28/1994
Title:
METHOD OF MAKING STRUCTURE FOR SUPPRESSION OF FIELD INVERSION CAUSED BY CHARGE BUILD-UP IN THE DIELECTRIC
25
Patent #:
Issue Dt:
12/17/1996
Application #:
08315465
Filing Dt:
09/30/1994
Title:
ARITHMETIC LOGIC UNIT WITH ZERO SUM PREDICTION
26
Patent #:
Issue Dt:
09/17/1996
Application #:
08316280
Filing Dt:
09/30/1994
Title:
FILTER FOR COMPUTER BUS SIGNALS
27
Patent #:
Issue Dt:
05/14/1996
Application #:
08316313
Filing Dt:
09/30/1994
Title:
CMOS OUTPUT BUFFER WITH ENHANCED ESD RESISTANCE
28
Patent #:
Issue Dt:
02/20/1996
Application #:
08335306
Filing Dt:
11/07/1994
Title:
CONDUCTIVE VIA STRUCTURE FOR INTEGRATED CIRCUITS AND METHOD FOR MAKING SAME
29
Patent #:
Issue Dt:
05/21/1996
Application #:
08339928
Filing Dt:
11/15/1994
Title:
DATAPATH SYNTHESIS METHOD AND APPARATUS UTILIZING A STRUCTURED CELL LIBRARY
30
Patent #:
Issue Dt:
12/24/1996
Application #:
08353022
Filing Dt:
12/09/1994
Title:
BUMP FORMATION ON YIELDED SEMICONDUCTOR DIES
31
Patent #:
Issue Dt:
07/09/1996
Application #:
08353463
Filing Dt:
12/09/1994
Title:
HIGH-FREQUENCY COAXIAL INTERFACE TEST FIXTURE
32
Patent #:
Issue Dt:
05/28/1996
Application #:
08355310
Filing Dt:
12/12/1994
Title:
METHOD FOR DETERMINING INSTANCE PLACEMENTS IN CIRCUIT LAYOUTS
33
Patent #:
Issue Dt:
02/11/1997
Application #:
08357632
Filing Dt:
12/16/1994
Title:
MICROPROCESSOR SYSTEM HAVING INSTRUCTION CACHE WITH RESERVED BRANCH TARGET SECTION
34
Patent #:
Issue Dt:
06/25/1996
Application #:
08360880
Filing Dt:
12/21/1994
Title:
WIREBOND LEAD SYSTEM WITH IMPROVED WIRE SEPARATION
35
Patent #:
Issue Dt:
07/16/1996
Application #:
08362028
Filing Dt:
12/21/1994
Title:
INTEGRATED CIRCUIT FABRICATION USING STATE MACHINE EXTRACTION FROM BEHAVIORAL HARDWARE DESCRIPTION LANGUAGE
36
Patent #:
Issue Dt:
07/08/1997
Application #:
08363064
Filing Dt:
12/21/1994
Title:
MULTIPLICATION/MULTIPLICATION-ACCUMULATION METHOD AND COMPUTING DEVICE
37
Patent #:
Issue Dt:
06/11/1996
Application #:
08366699
Filing Dt:
12/30/1994
Title:
METHOD OF PACKING AN IC DIE IN A MOLDED PLASTIC PACKAGE EMPLOYING AN ULTRA-THIN DIE COATING PROCESS
38
Patent #:
Issue Dt:
09/10/1996
Application #:
08366701
Filing Dt:
12/30/1994
Title:
METHOD AND APPARATUS FOR DETERMINING THE TIMING SPECIFICATION OF A DIGITAL CIRCUIT
39
Patent #:
Issue Dt:
03/25/1997
Application #:
08369601
Filing Dt:
01/06/1995
Title:
DUAL PURPOSE SECURITY ARCHITECTURE WITH PROTECTED INTERNAL OPERATING SYSTEM
40
Patent #:
Issue Dt:
10/29/1996
Application #:
08369616
Filing Dt:
01/06/1995
Title:
DIGITAL RANDOMIZER FOR ON-CHIP GENERATION AND STORAGE OF RANDOM SELF-PROGRAMMING DATA BLOCK
41
Patent #:
Issue Dt:
02/27/1996
Application #:
08371724
Filing Dt:
01/12/1995
Title:
HIGH-SPEED LOW-POWER CMOS PECL I/O TRANSMITTER
42
Patent #:
Issue Dt:
03/27/2001
Application #:
08372423
Filing Dt:
01/13/1995
Title:
SYSTEM MARGIN AND CORE TEMPERATURE MONITORING OF AN INTEGRATED CIRCUIT
43
Patent #:
Issue Dt:
12/29/1998
Application #:
08376491
Filing Dt:
01/23/1995
Title:
METHOD AND APPARATUS FOR IDENTIFYING FLIP-FLOPS IN HDL DESCRIPTIONS OF CIRCUITS WITHOUT SPECIFIC TEMPLATES
44
Patent #:
Issue Dt:
06/24/1997
Application #:
08383334
Filing Dt:
02/03/1995
Title:
FREQUENCY ADJUSTABLE PLL CLOCK GENERATION FOR A PLL BASED MICROPROCESSOR BASED ON TEMPERATURE AND/OR OPERATING VOLTAGE AND METHOD THEREFOR
45
Patent #:
Issue Dt:
05/06/1997
Application #:
08383385
Filing Dt:
02/03/1995
Title:
APPARATUS FOR MONITORING DISTRIBUTED I/O DEVICE BY PROVIDING A MONITOR IN EACH I/O DEVICE CONTROL FOR GENERATING SIGNALS BASED UPON THE DEVICE STATUS
46
Patent #:
Issue Dt:
12/10/1996
Application #:
08407225
Filing Dt:
03/20/1995
Title:
SLIP BUFFER FOR SYNCHRONIZING DATA TRANSFER BETWEEN TWO DEVICES
47
Patent #:
Issue Dt:
10/15/1996
Application #:
08415182
Filing Dt:
04/03/1995
Title:
MULTI-LEVEL ANTIFUSE STRUCTURE
48
Patent #:
Issue Dt:
06/10/1997
Application #:
08417622
Filing Dt:
04/06/1995
Title:
METHOD FOR ELIMINATING A FALSE CRITICAL PATH IN A LOGIC CIRCUIT
49
Patent #:
Issue Dt:
01/02/1996
Application #:
08433829
Filing Dt:
05/04/1995
Title:
FLOATING-POINT PROCESSOR WITH APPARENT-PRECISION BASED SELECTION OF EXECUTION-PRECISION
50
Patent #:
Issue Dt:
02/11/1997
Application #:
08434528
Filing Dt:
05/04/1995
Title:
METHOD FOR FORMING RELIABLE MOS DEVICES USING SILICON RICH PLASMA OXIDE FILM
51
Patent #:
Issue Dt:
06/04/1996
Application #:
08443131
Filing Dt:
05/17/1995
Title:
LOW NOISE LOW VOLTAGE PHASE LOCK LOOP
52
Patent #:
Issue Dt:
02/20/1996
Application #:
08445505
Filing Dt:
05/22/1995
Title:
CARRY-CHAIN COMPILER
53
Patent #:
Issue Dt:
01/14/1997
Application #:
08448597
Filing Dt:
07/20/1995
Title:
PIPELINED ANALOG TO DIGITAL CONVERTERS AND INTERSTAGE AMPLIFIERS FOR SUCH CONVERTERS
54
Patent #:
Issue Dt:
05/05/1998
Application #:
08471253
Filing Dt:
06/06/1995
Title:
TITANIUM BORIDE AND TITANIUM SILICIDE CONTACT BARRIER FORMATION FOR INTEGRATED CIRCUITS
55
Patent #:
Issue Dt:
08/27/1996
Application #:
08477197
Filing Dt:
06/07/1995
Title:
METHOD AND APPARATUS FOR ATTENUATING JITTER IN A DIGITAL TRANSMISSION LINE
56
Patent #:
Issue Dt:
11/12/1996
Application #:
08477311
Filing Dt:
06/06/1995
Title:
A METHOD FOR REDUCING CONTAMINATION OF ANTI-FUSE MATERIAL IN AN ANTI- FUSE STRUCTURE
57
Patent #:
Issue Dt:
08/13/1996
Application #:
08485094
Filing Dt:
06/07/1995
Title:
METHOD AND APPARATUS FOR ATTENUATING JITTER IN A DIGITAL TRANSMISSION LINE
58
Patent #:
Issue Dt:
04/08/1997
Application #:
08486401
Filing Dt:
06/05/1995
Title:
DYNAMIC ARBITRATION SYSTEM AND METHOD
59
Patent #:
Issue Dt:
07/16/1996
Application #:
08486405
Filing Dt:
06/05/1995
Title:
INTEGRATED CIRCUIT TEST JIG
60
Patent #:
Issue Dt:
05/14/1996
Application #:
08489525
Filing Dt:
06/12/1995
Title:
LARGE-TILTED-ANGLE NITROGEN IMPLANT INTO DIELECTRIC REGIONS OVERLAYING SOURCE/DRAIN REGIONS OF A TRANSISTOR
61
Patent #:
Issue Dt:
10/22/1996
Application #:
08493204
Filing Dt:
06/20/1995
Title:
BUILT-IN SELF TEST FOR INTEGRATED CIRCUITS HAVING READ/WRITE MEMORY
62
Patent #:
Issue Dt:
01/05/1999
Application #:
08500386
Filing Dt:
07/10/1995
Title:
METHOD AND APPARATUS FOR GUARANTEEING VALID DATA OUTPUT
63
Patent #:
Issue Dt:
09/24/1996
Application #:
08500416
Filing Dt:
07/10/1995
Title:
DIGITAL PHASE DETECTOR
64
Patent #:
Issue Dt:
04/23/1996
Application #:
08502464
Filing Dt:
07/13/1995
Title:
MULTI-FINGER INPUT BUFFER WITH TRANSISTOR GATES CAPACITIVELY COUPLED TO GROUND
65
Patent #:
Issue Dt:
05/27/1997
Application #:
08503795
Filing Dt:
07/18/1995
Title:
ENCODING ASSERTION AND DE-ASSERTION OF INTERRUPT REQUESTS AND DMA REQUESTS IN A SERIAL BUS I/O SYSTEM
66
Patent #:
Issue Dt:
09/02/1997
Application #:
08504936
Filing Dt:
07/20/1995
Title:
INPUT/OUTPUT(I/O) HOLDOFF MECHANISM FOR USE IN A SYSTEM WHERE I/O DEVICE INPUTS ARE FED THROUGH A LATENCY INTRODUCING BUS
67
Patent #:
Issue Dt:
10/29/1996
Application #:
08504944
Filing Dt:
07/20/1995
Title:
SPRING PROBE BGA (BALL GRID ARRAY) CONTACTOR WITH DEVICE STOP AND METHOD THEREFOR
68
Patent #:
Issue Dt:
12/28/1999
Application #:
08510076
Filing Dt:
08/01/1995
Title:
METHOD AND APPARATUS FOR ENHANCING ACCESS TO A SHARED MEMORY
69
Patent #:
Issue Dt:
10/01/1996
Application #:
08522856
Filing Dt:
09/01/1995
Title:
CENTRAL PROCESSING UNIT DATA ENTERING AND INTERROGATING DEVICE AND METHOD THEREFOR
70
Patent #:
Issue Dt:
01/21/1997
Application #:
08526119
Filing Dt:
09/07/1995
Title:
STATUS REGISTER WITH ASYNCHRONOUS READ AND RESET AND METHOD FOR PROVIDING SAME
71
Patent #:
Issue Dt:
03/04/1997
Application #:
08526956
Filing Dt:
09/12/1995
Title:
HIGH SPEED PHASE ALIGNER WITH JITTER REMOVAL
72
Patent #:
Issue Dt:
10/20/1998
Application #:
08528660
Filing Dt:
09/14/1995
Title:
METHOD AND A SYSTEM FOR SPECIFYING AND AUTOMATICALLY ANALYZING MULTIPLE CLOCK TIMING CONSTRAINTS IN A VLSI CIRCUIT
73
Patent #:
Issue Dt:
08/13/2002
Application #:
08530617
Filing Dt:
09/20/1995
Title:
METHOD AND APPARATUS FOR PROVIDING AND MAXIMIZING CONCURRENT OPERATIONS IN A SHARED MEMORY SYSTEM WHICH INCLUDES DISPLAY MEMORY
74
Patent #:
Issue Dt:
03/11/1997
Application #:
08532343
Filing Dt:
09/19/1995
Title:
MULTI-PURPOSE KEYBOARD INTERFACE
75
Patent #:
Issue Dt:
02/10/1998
Application #:
08532936
Filing Dt:
09/22/1995
Title:
COMPUTING DEVICE HAVING SEMI-DEDICATED HIGH SPEED BUS
76
Patent #:
Issue Dt:
07/28/1998
Application #:
08542498
Filing Dt:
10/13/1995
Title:
SYSTEM FOR REDUCING THE POWER CONSUMPTION OF A COMPUTER SYSTEM AND METHOD THEREFOR
77
Patent #:
Issue Dt:
04/20/1999
Application #:
08542869
Filing Dt:
10/13/1995
Title:
METHOD AND A SYSTEM FOR FIXING HOLD TIME VIOLATIONS IN HIERARCHICAL DESIGNS
78
Patent #:
Issue Dt:
11/24/1998
Application #:
08542870
Filing Dt:
10/13/1995
Title:
METHOD AND APPARATUS FOR EXTRACTING A CLOCK SIGNAL FROM A RECEIVED SIGNAL
79
Patent #:
Issue Dt:
06/24/1997
Application #:
08549985
Filing Dt:
10/30/1995
Title:
MULTI-LAYERED, INTEGRATED CIRCUIT PACKAGE HAVING REDUCED PARASITIC NOISE CHARACTERISTICS
80
Patent #:
Issue Dt:
09/09/1997
Application #:
08552666
Filing Dt:
11/03/1995
Title:
GTL INPUT RECEIVER WITH HYSTERESIS
81
Patent #:
Issue Dt:
01/20/1998
Application #:
08553113
Filing Dt:
11/07/1995
Title:
LEADFRAME BALL GRID ARRAY PACKAGE
82
Patent #:
Issue Dt:
12/08/1998
Application #:
08554688
Filing Dt:
11/07/1995
Title:
MOLDED LEADFRAME BALL GRID ARRAY
83
Patent #:
Issue Dt:
03/18/1997
Application #:
08567408
Filing Dt:
12/05/1995
Title:
DATA PROCESSOR WITH FLEXIBLE REGISTER MAPPING SCHEME
84
Patent #:
Issue Dt:
10/08/1996
Application #:
08574862
Filing Dt:
12/19/1995
Title:
ADAPTABLE LOAD BOARD ASSEMBLY FOR TESTING ICS WITH DIFFERENT POWER/GROUND BOND PAD AND/OR PIN
85
Patent #:
Issue Dt:
12/01/1998
Application #:
08578102
Filing Dt:
12/27/1995
Title:
WRAPPED-LINE CACHE FOR MICROPROCESSOR SYSTEM
86
Patent #:
Issue Dt:
06/09/1998
Application #:
08578120
Filing Dt:
12/26/1995
Title:
A SYSTEM FOR COMBINING DATA PACKETS FROM MULTIPLE SERIAL DATA STREAMS TO PROVIDE A SINGLE SERIAL DATA OUTPUT AND METHOD THEREFOR
87
Patent #:
Issue Dt:
08/17/1999
Application #:
08579172
Filing Dt:
12/27/1995
Title:
ELECTRICALLY CONDUCTIVE INTERCONNECTS FOR INTEGRATED CIRCUITS `
88
Patent #:
Issue Dt:
03/02/1999
Application #:
08579489
Filing Dt:
12/27/1995
Title:
METHOD FORMING FOCUS/EXPOSURE MATRIX ON A WAFER USING OVERLAPPED EXPOSURE
89
Patent #:
Issue Dt:
01/30/2001
Application #:
08579490
Filing Dt:
12/27/1995
Title:
HIGH VOLTAGE DETECT CIRCUIT WITH INCREASED LONG TERM RELIABILITY
90
Patent #:
Issue Dt:
01/19/1999
Application #:
08579605
Filing Dt:
12/26/1995
Title:
OPTIMIZED STRUCTURES FOR DUMMY FILL MASK DESIGN
91
Patent #:
Issue Dt:
08/04/1998
Application #:
08579824
Filing Dt:
12/28/1995
Title:
METHODS AND APPARATUS FOR FABRICATING ANTI-FUSE DEVICES
92
Patent #:
Issue Dt:
08/19/1997
Application #:
08581646
Filing Dt:
12/28/1995
Title:
SYSTEM AND METHOD FOR PROGRAMMING VROM LINKS
93
Patent #:
Issue Dt:
05/26/1998
Application #:
08581647
Filing Dt:
12/28/1995
Title:
SYSTEM AND METHOD FOR ALTERING BUS SPEED BASED ON BUS UTILIZATION
94
Patent #:
Issue Dt:
07/21/1998
Application #:
08582844
Filing Dt:
12/29/1995
Title:
METHOD OF MAKING ANTIFUSE STRUCTURES USING IMPLANTATION OF BOTH NEUTRAL AND DOPANT SPECIES
95
Patent #:
Issue Dt:
02/18/1997
Application #:
08586138
Filing Dt:
01/16/1996
Title:
CHARGE PUMP ADDRESSING
96
Patent #:
Issue Dt:
04/08/1997
Application #:
08593898
Filing Dt:
01/30/1996
Title:
METHOD FOR IMPROVING THE MANUFACTURABILITY OF THE SPIN-ON GLASS ETCHBACK PROCESS
97
Patent #:
Issue Dt:
06/17/1997
Application #:
08593900
Filing Dt:
01/30/1996
Title:
DUMMY UNDERLAYERS FOR IMPROVEMENT IN REMOVAL RATE CONSISTENCY DURING CHEMICAL MECHANICAL POLISHING
98
Patent #:
Issue Dt:
07/21/1998
Application #:
08594874
Filing Dt:
01/31/1996
Title:
OPTIMIZED UNDERLAYER STRUCTURES FOR MAINTAINING CHEMICAL MECHANICAL POLISHING REMOVAL RATES
99
Patent #:
Issue Dt:
10/13/1998
Application #:
08601137
Filing Dt:
02/13/1996
Title:
METHOD FOR ACHIEVING ACCURATE SOG ETCHBACK SELECTIVITY
100
Patent #:
Issue Dt:
12/24/1996
Application #:
08607372
Filing Dt:
02/27/1996
Title:
DYNAMIC DIRECTION LOOK AHEAD READ BUFFER
Assignor
1
Exec Dt:
12/20/1999
Assignee
1
1251 AVENUE OF THE AMERICAS
NEW YORK, NEW YORK 10020
Correspondence name and address
ELIZABETH PARSONS
1825 EYE STREET, NW
WASHINGTON, DC 20006

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