Total properties:
595
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6
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Patent #:
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Issue Dt:
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02/16/1999
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Application #:
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08837429
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Filing Dt:
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04/17/1997
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Title:
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SYSTEM FOR OPTIMIZING BUS ARBITRATION LATENCY AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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07/28/1998
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Application #:
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08837433
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Filing Dt:
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04/17/1997
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Title:
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DIGITAL POSITIONING JOYSTICK SYSTEM AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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08838020
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Filing Dt:
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04/22/1997
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Title:
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APPARATUS FOR AUTOMATED PILLAR LAYOUT AND METHOD FOR IMPLEMENTING SAME
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08838021
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Filing Dt:
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04/22/1997
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Title:
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VIRTUAL CONTIGUOUS FIFO HAVING THE PROVISION OF PACKET-DRIVEN AUTOMATIC ENDIAN CONVERSION
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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08844266
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Filing Dt:
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04/18/1997
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Title:
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COMMUNICATION TIMING CONTROL ARRANGEMENT AND METHOD THEREOF
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08846294
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Filing Dt:
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04/30/1997
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Title:
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VIRTUAL CONTIGUOUS FIFO FOR COMBINING MULTIPLE DATA PACKETS INTO A SINGLE CONTIGUOUS STREAM
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08846655
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Filing Dt:
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05/01/1997
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Title:
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SAMPLE RATE CONVERSION BETWEEN ASYNCHRONOUS DIGITAL SYSTEMS
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08846833
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Filing Dt:
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04/30/1997
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Title:
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ETCHING METALS USING CHLORINE GAS AND HYDROCHLORIC GAS IN DE-IONIZED WATER
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Patent #:
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Issue Dt:
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01/05/1999
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Application #:
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08848541
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Filing Dt:
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04/28/1997
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Title:
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A WAFER WITH A FOCUS/EXPOSURE MATRIX
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08851842
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Filing Dt:
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05/06/1997
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Title:
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METHOD FOR ACHIEVING LOW CAPACITANCE DIFFUSION PATTERN FILLING
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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08853288
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Filing Dt:
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05/09/1997
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Title:
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SYSTEM AND METHOD FOR SHARING PHYSICAL MEMORY AMONG DISTINCT COMPUTER ENVIRONMENTS
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08853355
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Filing Dt:
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05/08/1997
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Title:
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DEVICE AND A METHOD FOR MONITORING A SYSTEM CLOCK SIGNAL
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08856949
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Filing Dt:
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05/15/1997
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Title:
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MOISTURE BARRIER GAP FILL STRUCTURE AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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08857477
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Filing Dt:
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05/15/1997
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Title:
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METHOD AND APPARATUS FOR PERFORMING A SECURE OPERATION
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08858147
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Filing Dt:
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05/15/1997
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Title:
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SINGLE EVENT UPSET DETECTION AND PROTECTION IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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08859168
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Filing Dt:
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05/20/1997
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Title:
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MEMORY SPACE COMPRESSION TECHNIQUE FOR A SEQUENTIALLY ACCESSIBLE MEMORY
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Patent #:
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Issue Dt:
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06/08/1999
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Application #:
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08861941
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Filing Dt:
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05/22/1997
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Title:
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METHOD AND SYSTEM FOR TUNGSTEN CHEMICAL MECHANICAL POLISHING FOR UNPLANARIZED DIELECTRIC SURFACES
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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08864237
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Filing Dt:
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05/28/1997
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Title:
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WELL-BASED METHOD FOR ACHIEVING LOW CAPACITANCE DIFFUSION PATTERN FILLING
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08868853
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Filing Dt:
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06/04/1997
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Title:
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BUILT-IN SELF TEST FUNCTIONAL SYSTEM BLOCK FOR UTOPIA INTERFACE
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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08868886
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Filing Dt:
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06/04/1997
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Title:
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SECURE CRYPTOGRAPHIC MULTI-EXPONENTIATION METHOD AND COPROCESSOR SUBSYSTEM
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08870167
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Filing Dt:
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06/06/1997
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Title:
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PIN-REDUCED LOW POWER KEYBOARD SCANNER
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08873099
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Filing Dt:
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06/10/1997
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Title:
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MULTI-MASTER PCI BUS SYSTEM WITHIN A SINGLE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08876389
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Filing Dt:
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06/16/1997
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Title:
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TECHNIQUE TO PRODUCE CAVITY-UP HBGA PACKAGES
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Patent #:
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Issue Dt:
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04/20/1999
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Application #:
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08877095
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Filing Dt:
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06/17/1997
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Title:
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PLASMA ASH FOR SILICON SURFACE PREPARATION
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08879578
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Filing Dt:
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06/20/1997
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Title:
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METHOD OF MAKING A CUSTOM LASER CONDUCTOR LINKAGE FOR THE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/02/2000
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Application #:
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08880580
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Filing Dt:
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06/23/1997
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Title:
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OXIDE ETCH STOP TECHNIQUES FOR UNIFORM DAMASCENE TRENCH DEPTH
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Patent #:
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Issue Dt:
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11/16/1999
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Application #:
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08881614
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Filing Dt:
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06/25/1997
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|
Title:
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METHOD OF FORMING A VIA STRUCTURE INCLUDING CVD TUNGSTEN SILICDE BARRIER LAYER
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Patent #:
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Issue Dt:
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12/29/1998
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Application #:
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08883403
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Filing Dt:
|
06/26/1997
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Title:
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LOW POWER PROGRAMMABLE FUSE STRUCTURES SAME
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Patent #:
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Issue Dt:
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05/23/2000
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Application #:
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08885052
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Filing Dt:
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06/30/1997
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Title:
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DIGITAL INTEGRATED CIRCUIT BUFFER DIGITAL DEVICE AND METHOD FOR BUFFERING DATA
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Patent #:
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Issue Dt:
|
09/14/1999
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Application #:
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08885302
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Filing Dt:
|
06/30/1997
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Title:
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SELF-ALIGNED SILICIDATION TECHNIQUE TO INDEPENDENTLY FORM SILICIDES OF DIFFERENT THICKNESS ON A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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08885378
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Filing Dt:
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06/30/1997
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Title:
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SELECTIVE EXCLUSION OF SILICIDE FORMATION TO MAKE POLYSILICON RESISTORS
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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08885740
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Filing Dt:
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06/30/1997
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Title:
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METALLIZATION TECHNIQUE FOR GATE ELECTRODES AND LOCAL INTERCONNECTS
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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08886170
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Filing Dt:
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06/30/1997
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Title:
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SELF-ALIGNED PROCESSING OF SEMICONDUCTOR DEVICE FEATURES
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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08887459
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Filing Dt:
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07/02/1997
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Title:
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LOW VOLTAGE CMOS PROCESS AND DEVICE WITH INDIVIDUALLY ADJUSTABLE LDD SPACERS
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Patent #:
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Issue Dt:
|
07/14/1998
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Application #:
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08890127
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Filing Dt:
|
07/09/1997
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Title:
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FIRST-IN-FIRST-OUT (FIFO) CONTROLLER FOR BUFFERING DATA BETWEEN SYSTEMS WHICH ARE ASYNCHRONOUS AND FREE OF FALSE FLAGS AND INTERNAL METASTABILITY
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08890910
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Filing Dt:
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07/10/1997
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Title:
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INTEGRATED CIRCUIT SCRIBE LINE STRUCTURES AND METHODS FOR MAKING SAME
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Patent #:
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Issue Dt:
|
07/04/2000
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Application #:
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08892302
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Filing Dt:
|
07/14/1997
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|
Title:
|
RECEIVER SAMPLE RATE FREQUENCY ADJUSTMENT FOR SAMPLE RATE CONVERSION BETWEEN ASYNCHRONOUS DIGITAL SYSTEMS
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Patent #:
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|
Issue Dt:
|
07/11/2000
|
Application #:
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08892565
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Filing Dt:
|
07/14/1997
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Title:
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ELASTIC BUFFER TO INTERFACE DIGITAL SYSTEMS
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Patent #:
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Issue Dt:
|
03/16/1999
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Application #:
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08897216
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Filing Dt:
|
07/14/1997
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|
Title:
|
SMART RETRY MECHANISM TO PROGRAM THE RETRY LATENCY OF A PCI INITIATOR AGENT
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Patent #:
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|
Issue Dt:
|
05/02/2000
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Application #:
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08899531
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Filing Dt:
|
07/24/1997
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|
Title:
|
METHODS FOR MAKING SEMICONDUCTOR DEVICES HAVING AIR DIELECTRIC INTERCONNECT STRUCTURES
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Patent #:
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|
Issue Dt:
|
01/04/2000
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Application #:
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08901465
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Filing Dt:
|
07/28/1997
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|
Title:
|
METHOD AND SYSTEM FOR ACCURATE TEMPORAL DETERMINATION OF REAL-TIME EVENTS WITHIN A UNIVERSAL SERIAL BUS SYSTEM
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|
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|
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Patent #:
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|
Issue Dt:
|
03/21/2000
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Application #:
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08902091
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Filing Dt:
|
07/29/1997
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|
Title:
|
PERSONAL HANDYPHONE SYSTEM HARDWARE CHECKING OF BROADCASTING RECEPTION INDICATION
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
08902202
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Filing Dt:
|
07/29/1997
|
|
Title:
|
HARDWARE PCH CHECKING FOR PERSONAL HANDYPHONE SYSTEM PORTABLE STATION
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08904918
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Filing Dt:
|
08/01/1997
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|
Title:
|
REGISTER-BASED PROGRAMMABLE POST-SILICON SYSTEM TO PATCH AND DYNAMICALLY MODIFY THE BEHAVIOR OF SYNCHRONOUS STATE MACHINES
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Patent #:
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|
Issue Dt:
|
06/02/1998
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Application #:
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08905234
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Filing Dt:
|
08/01/1997
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|
Title:
|
FABRICATION METHOD FOR SUB-HALF MICRON CMOS TRANSISTOR
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Patent #:
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Issue Dt:
|
02/22/2000
|
Application #:
|
08906482
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Filing Dt:
|
08/05/1997
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|
Title:
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METHOD FOR ACHIEVING ACCURATE SOG ETCHBACK SELECTIVITY
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|
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Patent #:
|
|
Issue Dt:
|
01/11/2000
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Application #:
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08907099
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Filing Dt:
|
08/06/1997
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|
Title:
|
SILICON-ENRICHED SHALLOW TRENCH OXIDE FOR REDUCED RECESS DURING LDD SPACER ETCH
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|
|
|
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Patent #:
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Issue Dt:
|
08/10/1999
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Application #:
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08910590
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Filing Dt:
|
07/25/1997
|
|
Title:
|
SELECTING A TEST DATA INPUT BUS TO SUPPLY TEST DATA TO LOGICAL BLOCKS WITHIN AN INTEGRATED CIRCUIT
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|
|
|
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Patent #:
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|
Issue Dt:
|
02/08/2000
|
Application #:
|
08915543
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Filing Dt:
|
08/13/1997
|
|
Title:
|
A METHOD AND SYSTEM FOR USING DATA DECOMPRESSION ON COMPRESSED SOFTWARE STORED IN NON-VOLATILE MEMORY OF AN EMBEDDED COMPUTER SYSTEM TO YIELD DECOMPRESSED SOFTWARE INCLUDING INITIALIZED VARIABLES FOR A RUNTIME ENVIRONMENT
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Patent #:
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Issue Dt:
|
04/20/1999
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Application #:
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08918596
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Filing Dt:
|
08/23/1997
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|
Title:
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LOGIC IMPLEMENTATION OF CONTROL SIGNALS FOR ON-SILICON MULTI-MASTER DATA TRANSFER BUS
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Patent #:
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Issue Dt:
|
01/02/2001
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Application #:
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08921361
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Filing Dt:
|
08/29/1997
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|
Title:
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METHOD AND SYSTEM FOR FLOORPLANNING A CIRCUIT DESIGN AT A HIGH LEVEL OF ABSTRACTION
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Patent #:
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|
Issue Dt:
|
08/25/1998
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Application #:
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08922953
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Filing Dt:
|
09/03/1997
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|
Title:
|
INTEGRATED CIRCUIT STRUCTURE HAVING AN AIR DIELECTRIC AND DIELECTRIC SUPPORT PILLARS
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|
|
|
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Patent #:
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|
Issue Dt:
|
09/14/1999
|
Application #:
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08923106
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Filing Dt:
|
09/03/1997
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|
Title:
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METHOD AND APPARATUS FOR IMPROVING ALIGNMENT FOR METAL MASKING IN CONJUCTION WITH OXIDE AND TUNGSTEN CMP
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|
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Patent #:
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Issue Dt:
|
03/02/1999
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Application #:
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08925040
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Filing Dt:
|
09/08/1997
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|
Title:
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PHOTO ALIGNMENT STRUCTURE
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|
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Patent #:
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Issue Dt:
|
08/03/1999
|
Application #:
|
08927479
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Filing Dt:
|
09/11/1997
|
|
Title:
|
SELF-ALIGNED SILICIDATION STRUCTURE AND METHOD OF FORMATION THEREOF `
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|
|
|
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Patent #:
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|
Issue Dt:
|
08/17/1999
|
Application #:
|
08932310
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Filing Dt:
|
09/17/1997
|
|
Title:
|
COUNTER BASED RINGER INTERFACE
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|
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|
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Patent #:
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|
Issue Dt:
|
02/29/2000
|
Application #:
|
08932651
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Filing Dt:
|
09/18/1997
|
|
Title:
|
METHOD FOR MAINTAINING BUS OWNERSHIP WHILE BUS MASTERING
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|
|
|
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Patent #:
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|
Issue Dt:
|
02/22/2000
|
Application #:
|
08934449
|
Filing Dt:
|
09/19/1997
|
|
Title:
|
FLOATING-POINT PROCESSOR WITH OPERAND-FORMAT PRECISION GREATER THAN EXECUTION PRECISION
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|
|
|
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Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08934831
|
Filing Dt:
|
09/22/1997
|
|
Title:
|
METHODS OF FORMING PAIRS OF TRANSISTORS, AND METHODS OF FORMING PAIRS OF TRANSISTORS HAVING DIFFERENT VOLTAGE TOLERANCES
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|
|
|
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Patent #:
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|
Issue Dt:
|
10/05/1999
|
Application #:
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08941803
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Filing Dt:
|
10/03/1997
|
|
Title:
|
STANDARD CELL RING OSCILLATOR OF A NON-DETERMINISTIC RANDOMIZER CIRCUIT
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|
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Patent #:
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Issue Dt:
|
08/14/2001
|
Application #:
|
08941898
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Filing Dt:
|
09/30/1997
|
|
Title:
|
METHODS AND APPARATUS FOR DESIGN RULE CHECKING
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|
|
|
|
Patent #:
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Issue Dt:
|
10/16/2001
|
Application #:
|
08942108
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Filing Dt:
|
09/30/1997
|
|
Title:
|
PERSONAL HANDY-PHONE SYSTEM WIRELESS LOCAL LOOPS AND METHODS OF TRANSMITTING INFORMATION WITHIN PERSONAL HANDY-PHONE SYSTEMS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
08943891
|
Filing Dt:
|
10/03/1997
|
|
Title:
|
METHOD FOR FORMING VIA CONTACT HOLE IN A SEMICONDUCTOR DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08944463
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Filing Dt:
|
10/06/1997
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Title:
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SHAPED ETCH-FRONT FOR SELF-ALIGNED CONTACT
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Patent #:
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Issue Dt:
|
12/14/1999
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Application #:
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08947378
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Filing Dt:
|
10/08/1997
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Title:
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SECURE MEMORY MANAGEMENT UNIT WHICH UTILIZES A SYSTEM PROCESSOR TO PERFORM PAGE SWAPPING
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Patent #:
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Issue Dt:
|
12/21/1999
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Application #:
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08948189
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Filing Dt:
|
10/09/1997
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Title:
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MICROPROCESSOR WITH PROGRAMMABLE INSTRUCTION TRAP FOR DEIMPLEMENTING INSTRUCTIONS
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Patent #:
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Issue Dt:
|
10/05/1999
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Application #:
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08951396
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Filing Dt:
|
10/16/1997
|
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Title:
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METHOD FOR MEASURING THE EFFECTIVENESS OF OPTICAL PROXIMITY CORRECTIONS
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Patent #:
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Issue Dt:
|
11/02/1999
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Application #:
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08955012
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Filing Dt:
|
10/20/1997
|
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Title:
|
DIFFERENTIAL MOS CURRENT-MODE LOGIC CIRCUIT HAVING HIGH GAIN AND FAST SPEED
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Patent #:
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Issue Dt:
|
01/09/2001
|
Application #:
|
08957671
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Filing Dt:
|
10/24/1997
|
|
Title:
|
STANDARD CELL POWER-ON-RESET CIRCUIT
|
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Patent #:
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Issue Dt:
|
07/13/1999
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Application #:
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08958052
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Filing Dt:
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10/27/1997
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Title:
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HOST PROCESSOR AND COPROCESSOR ARRANGEMENT FOR PROCESSING PLATFORM-INDEPENDENT CODE
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|
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Patent #:
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Issue Dt:
|
03/21/2000
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Application #:
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08958530
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Filing Dt:
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10/27/1997
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Title:
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SCAN TESTABLE CIRCUIT ARRANGEMENT
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08960184
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Filing Dt:
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10/29/1997
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Title:
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PRIORITY ARBITRATION SYSTEM PROVIDING LOW LATENCY AND GUARANTEED ACCESS FOR DEVICES
|
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Patent #:
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Issue Dt:
|
09/28/1999
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Application #:
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08961648
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Filing Dt:
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10/31/1997
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Title:
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HIGH SPEED DIFFERENTIAL DRIVER CIRCUITRY AND METHODS FOR IMPLEMENTING THE SAME
|
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Patent #:
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Issue Dt:
|
09/28/1999
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Application #:
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08962466
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Filing Dt:
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10/31/1997
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Title:
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PHASE-LOCKED LOOP HAVING IMPROVED LOCKING TIMES AND A METHOD OF OPERATION THEREFORE
|
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Patent #:
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Issue Dt:
|
07/13/1999
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Application #:
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08962593
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Filing Dt:
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10/31/1997
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Title:
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SCALABLE N-PORT MEMORY STRUCTURES
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|
|
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Patent #:
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Issue Dt:
|
01/08/2002
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Application #:
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08962597
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Filing Dt:
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10/31/1997
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Title:
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CUSTOM IC HARDWARE MODELING USING STANDARD ICS
|
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|
|
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Patent #:
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Issue Dt:
|
03/28/2000
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Application #:
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08968555
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Filing Dt:
|
11/12/1997
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Title:
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METHOD AND SYSTEM FOR LATCHING AN ADDRESS FOR ACCESSING SYNCHRONOUS RANDOM ACCESS MEMORY USING A SINGLE ADDRESS STATUS SIGNAL CONTROL LINE
|
|
|
|
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Patent #:
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Issue Dt:
|
08/10/1999
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Application #:
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08969567
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Filing Dt:
|
11/13/1997
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Title:
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BI-LAYER PROGRAMMABLE RESISTOR MEMORY
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|
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Patent #:
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Issue Dt:
|
11/30/1999
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Application #:
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08972771
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Filing Dt:
|
11/18/1997
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Title:
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VCO HAVING A LOW SENSITIVITY TO NOISE ON THE POWER SUPPLY
|
|
|
|
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Patent #:
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|
Issue Dt:
|
10/26/1999
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Application #:
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08972838
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Filing Dt:
|
11/18/1997
|
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Title:
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VCO CIRCUIT HAVING LOW GAIN VARIATION OVER DIFFERENT PROCESSES AND OPERATING TEMPERATURES AND HAVING LOW POWER SUPPLY NOISE SENSITIVITY
|
|
|
|
|
Patent #:
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Issue Dt:
|
05/22/2001
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Application #:
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08974043
|
Filing Dt:
|
11/19/1997
|
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Title:
|
METHOD AND APPARATUS FOR DETECTING MISALIGNMENTS IN INTERCONNECT STRUCTURES
|
|
|
|
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Patent #:
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|
Issue Dt:
|
04/10/2001
|
Application #:
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08974131
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Filing Dt:
|
11/19/1997
|
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Title:
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METHOD FOR INTRODUCING HARMONICS INTO AN AUDIO STREAM FOR IMPROVING THREE DIMENSIONAL AUDIO POSITIONING
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|
|
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Patent #:
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Issue Dt:
|
09/14/1999
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Application #:
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08974203
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Filing Dt:
|
11/19/1997
|
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Title:
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METHOD FOR ALIGNMENT USING MULTIPLE WAVELENGTHS OF LIGHT
|
|
|
|
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Patent #:
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Issue Dt:
|
05/30/2000
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Application #:
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08976190
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Filing Dt:
|
11/21/1997
|
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Title:
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HIGH-SPEED LOGIC EMBODIED DIFFERENTIAL DYNAMIC CMOS TRUE SINGLE PHASE CLOCK LATCHES AND FLIP-FLOPS WITH SINGLE TRANSISTOR CLOCK LATCHES
|
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|
|
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Patent #:
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Issue Dt:
|
02/15/2000
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Application #:
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08976564
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Filing Dt:
|
11/24/1997
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Title:
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APPARATUS FOR EQUALIZING SIGNAL PARAMETERS IN FLIP CHIP REDISTRIBUTION LAYERS
|
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|
|
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Patent #:
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Issue Dt:
|
12/05/2000
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Application #:
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08978074
|
Filing Dt:
|
11/25/1997
|
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Title:
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INTEGRATED CIRCUIT INCLUDING PATCHING CIRCUITRY TO BYPASS PORTIONS OF AN INTERNALLY FLAWED READ ONLY MEMORY AND A METHOD THEREFORE
|
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|
|
|
Patent #:
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|
Issue Dt:
|
05/30/2000
|
Application #:
|
08978333
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Filing Dt:
|
11/25/1997
|
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Title:
|
AUDIO-RECORDING REMOTE CONTROL AND METHOD THEREFOR
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
04/10/2001
|
Application #:
|
08984483
|
Filing Dt:
|
12/01/1997
|
|
Title:
|
VIA ALIGNMENT ETCH COMPLETION AND CRITICAL DIMENSION MEASUREMENT METHOD AND STRUCTURE
|
|
|
|
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Patent #:
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Issue Dt:
|
03/14/2000
|
Application #:
|
08989833
|
Filing Dt:
|
12/12/1997
|
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Title:
|
INPUT SLOPE TIMING ANALYSIS AND NON-LINEAR DELAY TABLE OPTIMIZATION
|
|
|
|
|
Patent #:
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Issue Dt:
|
07/18/2000
|
Application #:
|
08993244
|
Filing Dt:
|
12/18/1997
|
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Title:
|
LOW POWER CLOCK SOUARER WITH TIGHT DUTY CYCLE CONTROL
|
|
|
|
|
Patent #:
|
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Issue Dt:
|
07/25/2000
|
Application #:
|
08995651
|
Filing Dt:
|
12/22/1997
|
|
Title:
|
METHOD FOR MAKING RELIABLE INTERCONNECT STRUCTURES
|
|
|
|
|
Patent #:
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Issue Dt:
|
03/07/2000
|
Application #:
|
08996836
|
Filing Dt:
|
12/23/1997
|
|
Title:
|
SIO2 WIRE BOND INSULATION IN SEMICONDUCTOR ASSEMBLIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
08997295
|
Filing Dt:
|
12/23/1997
|
|
Title:
|
OXIDE WIRE BOND INSULATION IN SEMICONDUCT0R ASEMBLIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
08999266
|
Filing Dt:
|
12/29/1997
|
|
Title:
|
DATA COMMUNICATION DEVICES, PERSONAL HANDY-PHONE SYSTEM BASE STATIONS, AND METHODS OF COMMUNICATING DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2000
|
Application #:
|
09002103
|
Filing Dt:
|
12/30/1997
|
|
Title:
|
METHOD FOR PREVENTING MICROMASKING IN SHALLOW TRENCH ISOLATION PROCESS ETCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
09005244
|
Filing Dt:
|
01/12/1998
|
|
Title:
|
INTEGRATED ETCH PROCESS FOR POLYSILICON/METAL GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2000
|
Application #:
|
09005358
|
Filing Dt:
|
01/09/1998
|
|
Title:
|
SINGLE ADDRESS QUEUE FOR HANDLING MULTIPLE PRIORITY REQUESTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09006926
|
Filing Dt:
|
01/14/1998
|
|
Title:
|
METHOD FOR FORMING STRAPLESS ANTI-FUSE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
09007117
|
Filing Dt:
|
01/14/1998
|
|
Title:
|
METHOD OF SELECTIVELY APPLYING DOPANTS TO AN INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE WITHOUT USING A MASK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09007673
|
Filing Dt:
|
01/15/1998
|
|
Publication #:
|
|
Pub Dt:
|
12/13/2001
| | | | |
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Title:
|
SEMICONDUCTOR PROCESSING METHODS AND STRUCTURES FOR DETERMINING ALIGNMENT DURING SEMICONDUCTOR WAFER PROCESSING
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|
