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Reel/Frame:018723/0678   Pages: 6
Recorded: 01/08/2007
Attorney Dkt #:852763.418
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
12/09/2008
Application #:
11537781
Filing Dt:
10/02/2006
Publication #:
Pub Dt:
04/19/2007
Title:
SWITCH BLOCK FOR FPGA ARCHITECTURES
Assignors
1
Exec Dt:
11/29/2006
2
Exec Dt:
11/29/2006
3
Exec Dt:
11/29/2006
4
Exec Dt:
11/23/2006
5
Exec Dt:
11/29/2006
6
Exec Dt:
11/29/2006
Assignee
1
VIA C. OLIVETTI, 2
AGRATE BRIANZA, ITALY 20041
Correspondence name and address
E. RUSSELL TARLETON
701 FIFTH AVENUE
SUITE 5400
SEATTLE, WA 98104

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