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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Total properties: 21

Patent #:	6843421	Issue Dt:	01/18/2005	Application #:	09928767	Filing Dt:	08/13/2001
Publication #:	US20030029920	Pub Dt:	02/13/2003
Title:	MOLDED MEMORY MODULE AND METHOD OF MAKING THE MODULE ABSENT A SUBSTRATE SUPPORT

Patent #:	7148570	Issue Dt:	12/12/2006	Application #:	09928975	Filing Dt:	08/13/2001
Publication #:	US20030030148	Pub Dt:	02/13/2003
Title:	LOW RESISTIVITY TITANIUM SILICIDE ON HEAVILY DOPED SEMICONDUCTOR

Patent #:	6490218	Issue Dt:	12/03/2002	Application #:	09932701	Filing Dt:	08/17/2001
Title:	DIGITAL MEMORY METHOD AND SYSTEM FOR STORING MULTIPLE BIT DIGITAL DATA

Patent #:	6724665	Issue Dt:	04/20/2004	Application #:	09943655	Filing Dt:	08/31/2001
Publication #:	US20030043643	Pub Dt:	03/06/2003
Title:	MEMORY DEVICE AND METHOD FOR SELECTABLE SUB-ARRAY ACTIVATION

Patent #:	6735546	Issue Dt:	05/11/2004	Application #:	09944613	Filing Dt:	08/31/2001
Publication #:	US20030046020	Pub Dt:	03/06/2003
Title:	MEMORY DEVICE AND METHOD FOR TEMPERATURE-BASED CONTROL OVER WRITE AND/OR READ OPERATIONS

Patent #:	6593624	Issue Dt:	07/15/2003	Application #:	09961278	Filing Dt:	09/25/2001
Publication #:	US20030057435	Pub Dt:	03/27/2003
Title:	THIN FILM TRANSISTORS WITH VERTICALLY OFFSET DRAIN REGIONS

Patent #:	7000063	Issue Dt:	02/14/2006	Application #:	09972787	Filing Dt:	10/05/2001
Publication #:	US20030070034	Pub Dt:	04/10/2003
Title:	WRITE-MANY MEMORY DEVICE AND METHOD FOR LIMITING A NUMBER OF WRITES TO THE WRITE-MANY MEMORY DEVICE

Patent #:	6768685	Issue Dt:	07/27/2004	Application #:	09990894	Filing Dt:	11/16/2001
Title:	INTEGRATED CIRCUIT MEMORY ARRAY WITH FAST TEST MODE UTILIZING MULTIPLE WORD LINE SELECTION AND METHOD THEREFOR

Patent #:	6889307	Issue Dt:	05/03/2005	Application #:	09990901	Filing Dt:	11/16/2001
Title:	INTEGRATED CIRCUIT INCORPORATING DUAL ORGANIZATION MEMORY ARRAY

Patent #:	6515923	Issue Dt:	02/04/2003	Application #:	10002268	Filing Dt:	11/15/2001
Title:	MEMORY ARRAY ORGANIZATION AND RELATED TEST METHOD PARTICULARLY WELL SUITED FOR INTEGRATED CIRCUITS HAVING WRITE-ONCE MEMORY ARRAYS

Patent #:	6483728	Issue Dt:	11/19/2002	Application #:	10002856	Filing Dt:	11/15/2001
Title:	CHARGE PUMP CIRCUIT

Patent #:	6624485	Issue Dt:	09/23/2003	Application #:	10010643	Filing Dt:	11/05/2001
Publication #:	US20030086284	Pub Dt:	05/08/2003
Title:	THREE-DIMENSIONAL, MASK-PROGRAMMED READ ONLY MEMORY

Patent #:	6901549	Issue Dt:	05/31/2005	Application #:	10023200	Filing Dt:	12/14/2001
Publication #:	US20030115535	Pub Dt:	06/19/2003
Title:	METHOD FOR ALTERING A WORD STORED IN A WRITE-ONCE MEMORY DEVICE

Patent #:	6563745	Issue Dt:	05/13/2003	Application #:	10023466	Filing Dt:	12/14/2001
Title:	MEMORY DEVICE AND METHOD FOR DYNAMIC BIT INVERSION

Patent #:	6895490	Issue Dt:	05/17/2005	Application #:	10023468	Filing Dt:	12/14/2001
Title:	METHOD FOR MAKING A WRITE-ONCE MEMORY DEVICE READ COMPATIBLE WITH A WRITE-MANY FILE SYSTEM

Patent #:	7219271	Issue Dt:	05/15/2007	Application #:	10024646	Filing Dt:	12/14/2001
Publication #:	US20030115518	Pub Dt:	06/19/2003
Title:	MEMORY DEVICE AND METHOD FOR REDUNDANCY/SELF-REPAIR

Patent #:	6928590	Issue Dt:	08/09/2005	Application #:	10024647	Filing Dt:	12/14/2001
Publication #:	US20030115514	Pub Dt:	06/19/2003
Title:	MEMORY DEVICE AND METHOD FOR STORING BITS IN NON-ADJACENT STORAGE LOCATIONS IN A MEMORY ARRAY

Patent #:	6704235	Issue Dt:	03/09/2004	Application #:	10027466	Filing Dt:	12/20/2001
Publication #:	US20030026158	Pub Dt:	02/06/2003
Title:	ANTI-FUSE MEMORY CELL WITH ASYMMETRIC BREAKDOWN VOLTAGE

Patent #:	6639312	Issue Dt:	10/28/2003	Application #:	10036291	Filing Dt:	11/07/2001
Publication #:	US20030087108	Pub Dt:	05/08/2003
Title:	DUMMY WAFERS AND METHODS FOR MAKING THE SAME

Patent #:	7018878	Issue Dt:	03/28/2006	Application #:	10045653	Filing Dt:	11/07/2001
Publication #:	US20030087484	Pub Dt:	05/08/2003
Title:	METAL STRUCTURES FOR INTEGRATED CIRCUITS AND METHODS FOR MAKING THE SAME

Patent #:	NONE	Issue Dt:		Application #:	10079472	Filing Dt:	02/19/2002
Publication #:	US20030155582	Pub Dt:	08/21/2003
Title:	Gate dielectric structures for integrated circuits and methods for making and using such gate dielectric structures

Assignor

Exec Dt:

01/04/2007

Assignee

3230 SCOTT BLVD

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	SILICON VALLEY BANK
	LOAN COLLATERAL HF154
	3003 TASMAN DRIVE
	SANTA CLARA, CA 95054

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