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Patent Assignment Details
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Reel/Frame:019063/0765   Pages: 6
Recorded: 03/26/2007
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 32
1
Patent #:
4716552
Issue Dt:
12/29/1987
Application #:
06717348
Filing Dt:
03/29/1985
Title:
METHOD AND APPARATUS FOR NON-DESTRUCTIVE ACCESS OF VOLATILE AND NON-VOLATILE DATA IN A SHADOW MEMORY ARRAY
2
Patent #:
4672580
Issue Dt:
06/09/1987
Application #:
06728963
Filing Dt:
04/30/1985
Title:
MEMORY CELL PROVIDING SIMULTANEOUS NON-DESTRUCTIVE ACCESS TO VOLATILE AND NON-VOLATILE DATA
3
Patent #:
4672241
Issue Dt:
06/09/1987
Application #:
06738925
Filing Dt:
05/29/1985
Title:
HIGH VOLTAGE ISOLATION CIRCUIT FOR CMOS NETWORKS
4
Patent #:
4789883
Issue Dt:
12/06/1988
Application #:
06811057
Filing Dt:
12/17/1985
Title:
INTEGRATED CIRCUIT STRUCTURE HAVING GATE ELECTRODE AND UNDERLYING OXIDE AND METHOD OF MAKING SAME
5
Patent #:
4774197
Issue Dt:
09/27/1988
Application #:
06875111
Filing Dt:
06/17/1986
Title:
METHOD OF IMPROVING SILICON DIOXIDE
6
Patent #:
4894353
Issue Dt:
01/16/1990
Application #:
07187738
Filing Dt:
04/29/1988
Title:
METHOD OF FABRICATING PASSIVATED TUNNEL OXIDE
7
Patent #:
4958321
Issue Dt:
09/18/1990
Application #:
07247887
Filing Dt:
09/22/1988
Title:
ONE TRANSISTOR FLASH EPROM CELL
8
Patent #:
4964143
Issue Dt:
10/16/1990
Application #:
07276278
Filing Dt:
11/23/1988
Title:
EPROM ELEMENT EMPLOYING SELF-ALIGNING PROCESS
9
Patent #:
5013675
Issue Dt:
05/07/1991
Application #:
07355634
Filing Dt:
05/23/1989
Title:
METHOD OF FORMING AND REMOVING POLYSILICON LIGHTLY DOPED DRAIN SPACERS
10
Patent #:
4914055
Issue Dt:
04/03/1990
Application #:
07398141
Filing Dt:
08/24/1989
Title:
SEMICONDUCTOR ANTIFUSE STRUCTURE AND METHOD
11
Patent #:
5107465
Issue Dt:
04/21/1992
Application #:
07407403
Filing Dt:
09/13/1989
Title:
ASYNCHRONOUS/SYNCHRONOUS PIPELINE DUAL MODE MEMORY ACCESS CIRCUIT AND METHOD
12
Patent #:
5077691
Issue Dt:
12/31/1991
Application #:
07426332
Filing Dt:
10/23/1989
Title:
FLASH EEPROM ARRAY WITH NEGATIVE GATE VOLTAGE ERASE OPERATION
13
Patent #:
5126808
Issue Dt:
06/30/1992
Application #:
07426601
Filing Dt:
10/23/1989
Title:
FLASH EEPROM ARRAY WITH PAGED ERASE ARCHITECTURE
14
Patent #:
4992391
Issue Dt:
02/12/1991
Application #:
07442903
Filing Dt:
11/29/1989
Title:
PROCESS FOR FABRICATING A CONTROL GATE FOR A FLOATING GATE FET
15
Patent #:
5008799
Issue Dt:
04/16/1991
Application #:
07505292
Filing Dt:
04/05/1990
Title:
BACK-TO-BACK CAPACITOR CHARGE PUMPS
16
Patent #:
5059815
Issue Dt:
10/22/1991
Application #:
07505335
Filing Dt:
04/05/1990
Title:
HIGH VOLTAGE CHARGE PUMPS WITH SERIES CAPACITORS
17
Patent #:
5113373
Issue Dt:
05/12/1992
Application #:
07563061
Filing Dt:
08/06/1990
Title:
POWER CONTROL CIRCUIT
18
Patent #:
5091326
Issue Dt:
02/25/1992
Application #:
07581341
Filing Dt:
09/12/1990
Title:
EPROM ELEMENT EMPLOYING SELF-ALIGNING PROCESS
19
Patent #:
5191556
Issue Dt:
03/02/1993
Application #:
07668608
Filing Dt:
03/13/1991
Title:
METHOD OF PAGE-MODE PROGRAMMING FLASH EEPROM CELL ARRAYS
20
Patent #:
5291446
Issue Dt:
03/01/1994
Application #:
07964684
Filing Dt:
10/22/1992
Title:
VPP POWER SUPPLY HAVING A REGULATOR CIRCUIT FOR CONTROLLING A REGULATED POSITIVE POTENTIAL
21
Patent #:
5263000
Issue Dt:
11/16/1993
Application #:
07964697
Filing Dt:
10/22/1992
Title:
DRAIN POWER SUPPLY
22
Patent #:
5376835
Issue Dt:
12/27/1994
Application #:
07964806
Filing Dt:
10/22/1992
Title:
POWER-ON RESET CIRCUIT
23
Patent #:
5282170
Issue Dt:
01/25/1994
Application #:
07964807
Filing Dt:
10/22/1992
Title:
NEGATIVE POWER SUPPLY
24
Patent #:
5477499
Issue Dt:
12/19/1995
Application #:
08135224
Filing Dt:
10/13/1993
Title:
MEMORY ARCHITECTURE FOR A THREE VOLT FLASH EEPROM
25
Patent #:
5579274
Issue Dt:
11/26/1996
Application #:
08483038
Filing Dt:
06/06/1995
Title:
A SENSE CIRCUIT FOR A FLASH EEPROM CELL HAVING A NEGATIVE DELTA THRESHOLD VOLTAGE
26
Patent #:
7197657
Issue Dt:
03/27/2007
Application #:
10406130
Filing Dt:
04/03/2003
Title:
BMC-HOSTED REAL-TIME CLOCK AND NON-VOLATILE RAM REPLACEMENT
27
Patent #:
7023740
Issue Dt:
04/04/2006
Application #:
10755979
Filing Dt:
01/12/2004
Title:
SUBSTRATE BIAS FOR PROGRAMMING NON-VOLATILE MEMORY
28
Patent #:
7254053
Issue Dt:
08/07/2007
Application #:
10776870
Filing Dt:
02/11/2004
Publication #:
US20040160801
Pub Dt:
08/19/2004
Title:
ACTIVE PROGRAMMING AND OPERATION OF A MEMORY DEVICE
29
Patent #:
7254692
Issue Dt:
08/07/2007
Application #:
10791417
Filing Dt:
03/02/2004
Title:
TESTING FOR OPERATING LIFE OF A MEMORY DEVICE WITH ADDRESS CYCLING USING A GRAY CODE SEQUENCE
30
Patent #:
7206914
Issue Dt:
04/17/2007
Application #:
10968414
Filing Dt:
10/19/2004
Title:
NON-VOLATILE MEMORY SYSTEM HAVING A PROGRAMMABLY SELECTABLE BOOT CODE SECTION SIZE
31
Patent #:
7221599
Issue Dt:
05/22/2007
Application #:
10978621
Filing Dt:
11/01/2004
Title:
POLYMER MEMORY CELL OPERATION
32
Patent #:
7344912
Issue Dt:
03/18/2008
Application #:
11069181
Filing Dt:
03/01/2005
Title:
METHOD FOR PATTERNING ELECTRICALLY CONDUCTING POLY(PHENYL ACETYLENE) AND POLY(DIPHENYL ACETYLENE)
Assignor
1
SPANSION INC.
Exec Dt:
01/31/2007
Assignee
1
SPANSION LLC
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CALIFORNIA 94088-3453
Correspondence name and address
RAYMOND E. FRITZ
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CA 94088-3453

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