skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:019069/0028   Pages: 6
Recorded: 03/27/2007
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 35
1
Patent #:
5940735
Issue Dt:
08/17/1999
Application #:
08917149
Filing Dt:
08/25/1997
Title:
REDUCTION OF CHARGE LOSS IN NONVOLATILE MEMORY CELLS BY PHOSPHORUS IMPLANTATION INTO PECVD NITRIDE/OXYNITRIDE FILMS
2
Patent #:
5981341
Issue Dt:
11/09/1999
Application #:
08986160
Filing Dt:
12/05/1997
Title:
SIDEWALL SPACER FOR PROTECTING TUNNEL OXIDE DURING ISOLATION TRENCH FORMATION IN SELF-ALIGNED FLASH MEMORY CORE
3
Patent #:
6002160
Issue Dt:
12/14/1999
Application #:
08989820
Filing Dt:
12/12/1997
Title:
SEMICONDUCTOR ISOLATION PROCESS TO MINIMIZE WEAK OXIDE PROBLEMS
4
Patent #:
6555867
Issue Dt:
04/29/2003
Application #:
08991448
Filing Dt:
12/16/1997
Title:
FLASH MEMORY GATE COUPLING USING HSG POLYSILICON
5
Patent #:
5907561
Issue Dt:
05/25/1999
Application #:
08992077
Filing Dt:
12/17/1997
Title:
METHOD TO IMPROVE TESTING SPEED OF MEMORY
6
Patent #:
6027998
Issue Dt:
02/22/2000
Application #:
08992536
Filing Dt:
12/17/1997
Title:
METHOD FOR FULLY PLANARIZED CONDUCTIVE LINE FOR A STACK GATE
7
Patent #:
6034394
Issue Dt:
03/07/2000
Application #:
08992950
Filing Dt:
12/18/1997
Title:
METHODS AND ARRANGEMENTS FOR FORMING A FLOATING GATE IN NON-VOLATILE MEMORY SEMICONDUCTOR DEVICES
8
Patent #:
6258669
Issue Dt:
07/10/2001
Application #:
08992960
Filing Dt:
12/18/1997
Title:
METHODS AND ARRANGEMENTS FOR IMPROVED FORMATION OF CONTROL AND FLOATING GATES IN NON-VOLATILE MEMORY SEMICONDUCTOR DEVICES
9
Patent #:
6063662
Issue Dt:
05/16/2000
Application #:
08993409
Filing Dt:
12/18/1997
Title:
METHODS FOR FORMING A CONTROL GATE APPARATUS IN NON-VOLATILE MEMORY SEMICONDUCTOR DEVICES
10
Patent #:
6808988
Issue Dt:
10/26/2004
Application #:
09019409
Filing Dt:
02/05/1998
Title:
METHOD FOR FORMING ISOLATION IN FLASH MEMORY WAFER
11
Patent #:
6285054
Issue Dt:
09/04/2001
Application #:
09052057
Filing Dt:
03/30/1998
Title:
TRENCHED GATE NON-VOLATILE SEMICONDUCTOR DEVICE WITH THE SOURCE/DRAIN REGIONS SPACED FROM THE TRENCH BY SIDEWALL DOPINGS
12
Patent #:
6225659
Issue Dt:
05/01/2001
Application #:
09052058
Filing Dt:
03/30/1998
Title:
TRENCHED GATE SEMICONDUCTOR DEVICE AND METHOD FOR LOW POWER APPLICATIONS
13
Patent #:
6147378
Issue Dt:
11/14/2000
Application #:
09052060
Filing Dt:
03/30/1998
Title:
FULLY RECESSED SEMICONDUCTOR DEVICE AND METHOD FOR LOW POWER APPLICATIONS WITH SINGLE WRAP AROUND BURIED DRAIN REGION
14
Patent #:
6147377
Issue Dt:
11/14/2000
Application #:
09052061
Filing Dt:
03/30/1998
Title:
FULLY RECESSED SEMICONDUCTOR DEVICE
15
Patent #:
6034395
Issue Dt:
03/07/2000
Application #:
09092352
Filing Dt:
06/05/1998
Title:
A SEMICONDUCTOR DEVICE HAVING A REDUCED HEIGHT FLOATING GATE
16
Patent #:
6174819
Issue Dt:
01/16/2001
Application #:
09119777
Filing Dt:
07/21/1998
Title:
LOW TEMPERATURE PHOTORESIST REMOVAL FOR REWORK DURING METAL MASK FORMATION
17
Patent #:
6100559
Issue Dt:
08/08/2000
Application #:
09134525
Filing Dt:
08/14/1998
Title:
MULTIPURPOSE GRADED SILICON OXYNITRIDE CAP LAYER
18
Patent #:
6107169
Issue Dt:
08/22/2000
Application #:
09134526
Filing Dt:
08/14/1998
Title:
METHOD FOR FABRICATING A DOPED POLYSILICON FEATURE IN A SEMICONDUCTOR DEVICE
19
Patent #:
5972751
Issue Dt:
10/26/1999
Application #:
09143090
Filing Dt:
08/28/1998
Title:
METHODS AND ARRANGEMENTS FOR INTRODUCING NITROGEN INTO A TUNNEL OXIDE IN A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
20
Patent #:
6001713
Issue Dt:
12/14/1999
Application #:
09154074
Filing Dt:
09/16/1998
Title:
METHODS FOR FORMING NITROGEN-RICH REGIONS IN A FLOATING GATE AND INTERPOLY DIELECTRIC LAYER IN A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
21
Patent #:
6242773
Issue Dt:
06/05/2001
Application #:
09163310
Filing Dt:
09/30/1998
Title:
SELF-ALIGNING POLY 1 ONO DIELECTRIC FOR NON-VOLATILE MEMORY
22
Patent #:
6251717
Issue Dt:
06/26/2001
Application #:
09163315
Filing Dt:
09/30/1998
Title:
VIABLE MEMORY CELL FORMED USING RAPID THERMAL ANNEALING
23
Patent #:
6163049
Issue Dt:
12/19/2000
Application #:
09170061
Filing Dt:
10/13/1998
Title:
METHOD OF FORMING A COMPOSITE INTERPOLY GATE DIELECTRIC
24
Patent #:
6211020
Issue Dt:
04/03/2001
Application #:
09177294
Filing Dt:
10/22/1998
Title:
PROCESS FOR FABRICATING A COMMON SOURCE REGION IN MEMORY DEVICES
25
Patent #:
6252276
Issue Dt:
06/26/2001
Application #:
09377183
Filing Dt:
08/19/1999
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING ASSYMETRICALLY NITROGEN DOPED GATE OXIDE
26
Patent #:
6309949
Issue Dt:
10/30/2001
Application #:
09440934
Filing Dt:
11/16/1999
Title:
SEMICONDUCTOR ISOLATION PROCESS TO MINIMIZE WEAK OXIDE PROBLEMS
27
Patent #:
6225161
Issue Dt:
05/01/2001
Application #:
09470568
Filing Dt:
12/22/1999
Title:
FULLY RECESSED SEMICONDUCTOR METHOD FOR LOW POWER APPLICATIONS WITH SINGLE WRAP AROUND BURIED DRAIN REGION
28
Patent #:
6274433
Issue Dt:
08/14/2001
Application #:
09476121
Filing Dt:
01/03/2000
Title:
METHODS AND ARRANGEMENTS FOR FORMING A FLOATING GATE IN NON-VOLATILE MEMORY SEMICONDUCTOR DEVICES
29
Patent #:
6306758
Issue Dt:
10/23/2001
Application #:
09567534
Filing Dt:
05/10/2000
Title:
Multipurpose graded silicon oxynitride cap layer
30
Patent #:
6344393
Issue Dt:
02/05/2002
Application #:
09620339
Filing Dt:
07/20/2000
Title:
Fully recessed semiconductor method for low power applications
31
Patent #:
6764904
Issue Dt:
07/20/2004
Application #:
09629780
Filing Dt:
07/31/2000
Title:
TRENCHED GATE NON-VOLATILE SEMICONDUCTOR METHOD WITH THE SOURCE/DRAIN REGIONS SPACED FROM THE TRENCH BY SIDEWALL DOPINGS
32
Patent #:
6303437
Issue Dt:
10/16/2001
Application #:
09632536
Filing Dt:
08/04/2000
Title:
A TRENCHED GATE NON-VOLATILE SEMICONDUCTOR DEVICE AND METHOD FOR LOW POWER APPLICATIONS WITH CORNER DOPING AND SIDEWALL DOPING
33
Patent #:
6579778
Issue Dt:
06/17/2003
Application #:
09634991
Filing Dt:
08/08/2000
Title:
SOURCE BUS FORMATION FOR A FLASH MEMORY USING SILICIDE
34
Patent #:
6413820
Issue Dt:
07/02/2002
Application #:
09725843
Filing Dt:
11/30/2000
Publication #:
US20010015456
Pub Dt:
08/23/2001
Title:
METHOD OF FORMING A COMPOSITE INTERPOLY GATE DIELECTRIC
35
Patent #:
6989319
Issue Dt:
01/24/2006
Application #:
10718707
Filing Dt:
11/24/2003
Title:
METHODS FOR FORMING NITROGEN-RICH REGIONS IN NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES
Assignor
1
SPANSION INC.
Exec Dt:
01/31/2007
Assignee
1
SPANSION LLC
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CALIFORNIA 94088-3453
Correspondence name and address
RAYMOND E. FRITZ
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CA 94088-3453

Search Results as of: 05/13/2024 02:31 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT