Total properties:
35
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09399414
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Filing Dt:
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09/20/1999
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Title:
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PROCESS TO IMPROVE READ DISTURB FOR NAND FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09430765
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Filing Dt:
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10/29/1999
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Title:
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METHOD FOR FORMING FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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09489232
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Filing Dt:
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01/21/2000
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Title:
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High speed charging of core cell drain lines in a memory device
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09501448
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Filing Dt:
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02/10/2000
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Title:
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Simultaneous program, program-verify scheme
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Patent #:
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Issue Dt:
|
09/04/2001
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Application #:
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09506351
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Filing Dt:
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02/17/2000
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Title:
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High speed sensing to detect write protect state in a flash memory device
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09511874
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Filing Dt:
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02/25/2000
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Title:
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Variable pulse width memory programming
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09512617
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Filing Dt:
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02/25/2000
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Title:
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High speed, high precision, power supply and process independent boost level clamping technique
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09512854
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Filing Dt:
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02/25/2000
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Title:
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Dynamic memory cell programming voltage
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09513027
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Filing Dt:
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02/25/2000
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Title:
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USER SELECTABLE CELL PROGRAMMING
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09513260
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Filing Dt:
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02/24/2000
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Title:
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DOUBLE SELF-ALIGNING SHALLOW TRENCH ISOLATION SEMICONDUCTOR AND MANUFACTURING METHOD THEREFOR
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Patent #:
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Issue Dt:
|
09/10/2002
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Application #:
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09513261
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Filing Dt:
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02/24/2000
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Title:
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SEMICONDUCTOR WITH INCREASED GATE COUPLING COEFFICIENT
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Patent #:
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Issue Dt:
|
10/02/2001
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Application #:
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09513402
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Filing Dt:
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02/25/2000
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Title:
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MODE INDICATOR FOR MULTI-LEVEL MEMORY
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09513643
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Filing Dt:
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02/25/2000
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Title:
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Multilevel cell programming
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Patent #:
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Issue Dt:
|
04/27/2004
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Application #:
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09513698
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Filing Dt:
|
02/25/2000
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Title:
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DATA RECYCLING IN MEMORY
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Patent #:
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Issue Dt:
|
03/16/2004
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Application #:
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09516478
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Filing Dt:
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03/01/2000
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Title:
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INTERLACED MULTI-LEVEL MEMORY
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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09525078
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Filing Dt:
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03/14/2000
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Title:
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CHAINED ARRAY OF SEQUENTIAL ACCESS MEMORIES ENABLING CONTINUOUS READ
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Patent #:
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|
Issue Dt:
|
03/20/2001
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Application #:
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09610764
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Filing Dt:
|
07/06/2000
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Title:
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Temperature-compensated bias generator
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|
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Patent #:
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|
Issue Dt:
|
12/17/2002
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Application #:
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09636333
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Filing Dt:
|
08/10/2000
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Title:
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SELF-ALIGNED GATE SEMICONDUCTOR
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Patent #:
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Issue Dt:
|
05/20/2003
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Application #:
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09644359
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Filing Dt:
|
08/23/2000
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Title:
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PHYSICAL MEMORY LAYOUT WITH VARIOUS SIZED MEMORY SECTORS
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|
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Patent #:
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|
Issue Dt:
|
04/23/2002
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Application #:
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09645623
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Filing Dt:
|
08/24/2000
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Title:
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Fast-erase memory devices and method for reducing erasing time in a memory device
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|
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Patent #:
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|
Issue Dt:
|
07/01/2003
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Application #:
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09654965
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Filing Dt:
|
09/05/2000
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Title:
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METHOD OF MICRO-ARCHITECTURAL IMPLEMENTATION OF INTERFACE BETWEEN BIST STATE MACHINE AND TESTER INTERFACE TO ENABLE BIST CYCLING
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Patent #:
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Issue Dt:
|
09/16/2003
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Application #:
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09655335
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Filing Dt:
|
09/05/2000
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Title:
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METHOD OF MICRO-ARCHITECTURAL IMPLEMENTATION ON BIST FRONTED STATE MACHINE UTILIZING 'DEATH LOGIC' STATE TRANSITION FOR AREA MINIMIZATION
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|
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Patent #:
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|
Issue Dt:
|
11/25/2003
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Application #:
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09662791
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Filing Dt:
|
09/15/2000
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Title:
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SIMULTANEOUS EXECUTION COMMAND MODES IN A FLASH MEMORY DEVICE
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Patent #:
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|
Issue Dt:
|
09/18/2001
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Application #:
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09696652
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Filing Dt:
|
10/25/2000
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Title:
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Power saving on the fly during reading of data from a memory device
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|
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Patent #:
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|
Issue Dt:
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11/29/2005
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Application #:
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09727714
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Filing Dt:
|
11/28/2000
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Title:
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FLASH NVROM DEVICES WITH UV CHARGE IMMUNITY
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Patent #:
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Issue Dt:
|
09/10/2002
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Application #:
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09764965
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Filing Dt:
|
01/17/2001
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Title:
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ADAPTIVE REFERENCE CELLS FOR A MEMORY DEVICE
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|
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Patent #:
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|
Issue Dt:
|
01/04/2005
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Application #:
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09825027
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Filing Dt:
|
04/02/2001
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Title:
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CLOCKED BASED METHOD AND DEVICES FOR MEASURING VOLTAGE-VARIABLE CAPACITANCES AND OTHER ON-CHIP PARAMETERS
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|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
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Application #:
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09829657
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Filing Dt:
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04/10/2001
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Publication #:
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Pub Dt:
|
12/06/2001
| | | | |
Title:
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DUAL-PORTED CAMS FOR A SIMULTANEOUS OPERATION FLASH MEMORY
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|
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Patent #:
|
|
Issue Dt:
|
03/18/2003
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Application #:
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09905421
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Filing Dt:
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07/13/2001
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Publication #:
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|
Pub Dt:
|
11/08/2001
| | | | |
Title:
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MIXED MODE MULTI LEVEL MODE INDICTOR
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|
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Patent #:
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|
Issue Dt:
|
11/09/2004
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Application #:
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10238880
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Filing Dt:
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09/11/2002
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Publication #:
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|
Pub Dt:
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03/20/2003
| | | | |
Title:
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MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
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Application #:
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10304863
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Filing Dt:
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11/27/2002
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Publication #:
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|
Pub Dt:
|
02/12/2004
| | | | |
Title:
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MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
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Application #:
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10413818
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Filing Dt:
|
04/15/2003
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Publication #:
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|
Pub Dt:
|
09/18/2003
| | | | |
Title:
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MEMORY DEVICE WITH ACTIVE AND PASSIVE LAYERS
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|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
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10413841
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Filing Dt:
|
04/15/2003
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Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
MEMORY DEVICE WITH ACTIVE PASSIVE LAYERS
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|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
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Application #:
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10414353
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Filing Dt:
|
04/15/2003
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Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
Title:
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MEMORY DEVICE
|
|
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Patent #:
|
|
Issue Dt:
|
10/18/2005
|
Application #:
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10603136
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Filing Dt:
|
06/23/2003
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Title:
|
SIMULTANEOUS EXECUTION COMMAND MODES IN A FLASH MEMORY DEVICE
|
|