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Patent Assignment Details
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Reel/Frame:019069/0342   Pages: 6
Recorded: 03/27/2007
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 35
1
Patent #:
6654283
Issue Dt:
11/25/2003
Application #:
10013993
Filing Dt:
12/11/2001
Title:
FLASH MEMORY ARRAY ARCHITECTURE AND METHOD OF PROGRAMMING, ERASING AND READING THEREOF
2
Patent #:
6836432
Issue Dt:
12/28/2004
Application #:
10074495
Filing Dt:
02/11/2002
Title:
PARTIAL PAGE PROGRAMMING OF MULTI LEVEL FLASH
3
Patent #:
6461905
Issue Dt:
10/08/2002
Application #:
10081246
Filing Dt:
02/22/2002
Title:
DUMMY GATE PROCESS TO REDUCE THE VSS RESISTANCE OF FLASH PRODUCTS
4
Patent #:
6768683
Issue Dt:
07/27/2004
Application #:
10095739
Filing Dt:
03/12/2002
Title:
LOW COLUMN LEAKAGE FLASH MEMORY ARRAY
5
Patent #:
6646914
Issue Dt:
11/11/2003
Application #:
10096313
Filing Dt:
03/12/2002
Title:
FLASH MEMORY ARRAY ARCHITECTURE HAVING STAGGERED METAL LINES
6
Patent #:
6639844
Issue Dt:
10/28/2003
Application #:
10099499
Filing Dt:
03/13/2002
Title:
OVERERASE CORRECTION METHOD
7
Patent #:
6620717
Issue Dt:
09/16/2003
Application #:
10100487
Filing Dt:
03/14/2002
Title:
MEMORY WITH DISPOSABLE ARC FOR WORDLINE FORMATION
8
Patent #:
6734028
Issue Dt:
05/11/2004
Application #:
10113152
Filing Dt:
03/28/2002
Title:
METHOD OF DETECTING SHALLOW TRENCH ISOLATION CORNER THINNING BY ELECTRICAL STRESS
9
Patent #:
6784682
Issue Dt:
08/31/2004
Application #:
10113259
Filing Dt:
03/28/2002
Title:
METHOD OF DETECTING SHALLOW TRENCH ISOLATION CORNER THINNING BY ELECTRICAL TRAPPING
10
Patent #:
6700815
Issue Dt:
03/02/2004
Application #:
10119273
Filing Dt:
04/08/2002
Publication #:
US20030189843
Pub Dt:
10/09/2003
Title:
REFRESH SCHEME FOR DYNAMIC PAGE PROGRAMMING
11
Patent #:
6901010
Issue Dt:
05/31/2005
Application #:
10119366
Filing Dt:
04/08/2002
Title:
ERASE METHOD FOR A DUAL BIT MEMORY CELL
12
Patent #:
6690602
Issue Dt:
02/10/2004
Application #:
10119391
Filing Dt:
04/08/2002
Title:
ALGORITHM DYNAMIC REFERENCE PROGRAMMING
13
Patent #:
6606273
Issue Dt:
08/12/2003
Application #:
10121140
Filing Dt:
04/11/2002
Title:
METHODS AND SYSTEMS FOR FLASH MEMORY TUNNEL OXIDE RELIABILITY TESTING
14
Patent #:
6716710
Issue Dt:
04/06/2004
Application #:
10126207
Filing Dt:
04/19/2002
Title:
USING A FIRST LINER LAYER AS A SPACER IN A SEMICONDUCTOR DEVICE
15
Patent #:
6570787
Issue Dt:
05/27/2003
Application #:
10126330
Filing Dt:
04/19/2002
Title:
PROGRAMMING WITH FLOATING SOURCE FOR LOW POWER, LOW LEAKAGE AND HIGH DENSITY FLASH MEMORY DEVICES
16
Patent #:
6576487
Issue Dt:
06/10/2003
Application #:
10126363
Filing Dt:
04/19/2002
Title:
NOVEL METHOD TO DISTINGUISH AN STI OUTER EDGE CURRENT COMPONENT WITH AN STI NORMAL CURRENT COMPONENT
17
Patent #:
6689666
Issue Dt:
02/10/2004
Application #:
10126841
Filing Dt:
04/19/2002
Title:
REPLACING A FIRST LINER LAYER WITH A THICKER OXIDE LAYER WHEN FORMING A SEMICONDUCTOR DEVICE
18
Patent #:
6642106
Issue Dt:
11/04/2003
Application #:
10159323
Filing Dt:
05/31/2002
Title:
METHOD FOR INCREASING CORE GAIN IN FLASH MEMORY DEVICE USING STRAINED SILICON
19
Patent #:
6646462
Issue Dt:
11/11/2003
Application #:
10178144
Filing Dt:
06/24/2002
Title:
EXTRACTION OF DRAIN JUNCTION OVERLAP WITH THE GATE AND THE CHANNEL LENGTH FOR ULTRA-SMALL CMOS DEVICES WITH ULTRA-THIN GATE OXIDES
20
Patent #:
6859748
Issue Dt:
02/22/2005
Application #:
10190420
Filing Dt:
07/03/2002
Title:
TEST STRUCTURE FOR MEASURING EFFECT OF TRENCH ISOLATION ON OXIDE IN A MEMORY DEVICE
21
Patent #:
6643185
Issue Dt:
11/04/2003
Application #:
10215140
Filing Dt:
08/07/2002
Title:
METHOD FOR REPAIRING OVER-ERASURE OF FAST BITS IN FLOATING GATE MEMORY DEVICES
22
Patent #:
6828623
Issue Dt:
12/07/2004
Application #:
10232487
Filing Dt:
08/30/2002
Title:
FLOATING GATE MEMORY DEVICE WITH HOMOGENEOUS OXYNITRIDE TUNNELING DIELECTRIC
23
Patent #:
6773988
Issue Dt:
08/10/2004
Application #:
10243108
Filing Dt:
09/13/2002
Title:
MEMORY WORDLINE SPACER
24
Patent #:
6754106
Issue Dt:
06/22/2004
Application #:
10245146
Filing Dt:
09/16/2002
Title:
REFERENCE CELL WITH VARIOUS LOAD CIRCUITS COMPENSATING FOR SOURCE SIDE LOADING EFFECTS IN A NON-VOLATILE MEMORY
25
Patent #:
6897533
Issue Dt:
05/24/2005
Application #:
10247641
Filing Dt:
09/18/2002
Title:
A MULTI-BIT SILICON NITRIDE CHARGE-TRAPPING NON-VOLATILE MEMORY CELL
26
Patent #:
6994939
Issue Dt:
02/07/2006
Application #:
10283685
Filing Dt:
10/29/2002
Title:
SEMICONDUCTOR MANUFACTURING RESOLUTION ENHANCEMENT SYSTEM AND METHOD FOR SIMULTANEOUSLY PATTERNING DIFFERENT FEATURE TYPES
27
Patent #:
7076703
Issue Dt:
07/11/2006
Application #:
10305700
Filing Dt:
11/26/2002
Title:
METHOD AND SYSTEM FOR DEFINING A REDUNDANCY WINDOW AROUND A PARTICULAR COLUMN IN A MEMORY ARRAY
28
Patent #:
7049188
Issue Dt:
05/23/2006
Application #:
10305724
Filing Dt:
11/26/2002
Publication #:
US20040102026
Pub Dt:
05/27/2004
Title:
LATERAL DOPED CHANNEL
29
Patent #:
6897110
Issue Dt:
05/24/2005
Application #:
10305750
Filing Dt:
11/26/2002
Title:
METHOD OF PROTECTING A MEMORY ARRAY FROM CHARGE DAMAGE DURING FABRICATION
30
Patent #:
6906959
Issue Dt:
06/14/2005
Application #:
10306252
Filing Dt:
11/27/2002
Publication #:
US20040169218
Pub Dt:
09/02/2004
Title:
METHOD AND SYSTEM FOR ERASING A NITRIDE MEMORY DEVICE
31
Patent #:
6743677
Issue Dt:
06/01/2004
Application #:
10306529
Filing Dt:
11/27/2002
Title:
METHOD FOR FABRICATING NITRIDE MEMORY CELLS USING A FLOATING GATE FABRICATION PROCESS
32
Patent #:
6813752
Issue Dt:
11/02/2004
Application #:
10306667
Filing Dt:
11/26/2002
Title:
METHOD OF DETERMINING CHARGE LOSS ACTIVATION ENERGY OF A MEMORY ARRAY
33
Patent #:
6643177
Issue Dt:
11/04/2003
Application #:
10349293
Filing Dt:
01/21/2003
Title:
METHOD FOR IMPROVING READ MARGIN IN A FLASH MEMORY DEVICE
34
Patent #:
6861696
Issue Dt:
03/01/2005
Application #:
10429140
Filing Dt:
05/03/2003
Title:
STRUCTURE AND METHOD FOR A TWO-BIT MEMORY CELL
35
Patent #:
7053446
Issue Dt:
05/30/2006
Application #:
10864142
Filing Dt:
06/08/2004
Title:
MEMORY WORDLINE SPACER
Assignor
1
SPANSION INC.
Exec Dt:
01/31/2007
Assignee
1
SPANSION LLC
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CALIFORNIA 94088-3453
Correspondence name and address
RAYMOND E. FRITZ
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CA 94088-3453

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