Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 019089/0216 | |
| Pages: | 3 |
| | Recorded: | 03/09/2007 | | |
| Attorney Dkt #: | 9319I-002110 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11716738
|
Filing Dt:
|
03/09/2007
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
|
Title:
|
Method of manufacturing interconnect substrate
|
|
|
Assignee
|
|
|
|
|
| 4-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU |
| TOKYO, JAPAN 163-0811 |
|
|
Correspondence name and address
|
| |
G. GREGORY SCHIVLEY
|
| |
HARNESS DICKEY & PIERCE, PLC
|
| |
P.O. BOX 828
|
| |
BLOOMFIELD HILLS, MI 48303
|
Search Results as of:
04/19/2024 08:33 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
