Total properties:
16
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10227950
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Filing Dt:
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08/27/2002
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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POWER CONTROLLING METHOD FOR SEMICONDUCTOR STORAGE DEVICE AND SEMICONDUCTOR STORAGE DEVICE EMPLOYING SAME
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Patent #:
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Issue Dt:
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10/11/2005
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Application #:
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10372000
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Filing Dt:
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02/20/2003
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Publication #:
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Pub Dt:
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10/30/2003
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Title:
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BOOSTED POTENTIAL GENERATION CIRCUIT AND CONTROL METHOD
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10443645
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Filing Dt:
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05/22/2003
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Publication #:
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Pub Dt:
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01/08/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10447893
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Filing Dt:
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05/29/2003
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Publication #:
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Pub Dt:
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04/08/2004
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
|
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Issue Dt:
|
10/11/2005
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Application #:
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10633710
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Filing Dt:
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08/05/2003
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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SEMICONDUCTOR MEMORY DEVICE INCLUDING SUBWORD DRIVERS
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10656351
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
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09/23/2004
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
03/21/2006
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Application #:
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10669303
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Filing Dt:
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09/24/2003
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Publication #:
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Pub Dt:
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04/01/2004
| | | | |
Title:
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ADDRESS COUNTER CONTROL SYSTEM WITH PATH SWITCHING
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Patent #:
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|
Issue Dt:
|
05/24/2005
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Application #:
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10669304
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Filing Dt:
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09/24/2003
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Publication #:
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Pub Dt:
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04/01/2004
| | | | |
Title:
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SEMICONDUCTOR DEVICE USING CURRENT MIRROR CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
05/08/2007
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Application #:
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10699223
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Filing Dt:
|
10/30/2003
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Publication #:
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Pub Dt:
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11/04/2004
| | | | |
Title:
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DRAM WITH SUPER SELF-REFRESH AND ERROR CORRECTION FOR EXTENDED PERIOD BETWEEN REFRESH OPERATIONS
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Patent #:
|
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Issue Dt:
|
05/29/2007
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Application #:
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10777704
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Filing Dt:
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02/13/2004
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Publication #:
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Pub Dt:
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12/09/2004
| | | | |
Title:
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A MEMORY WITH MEMORY CELLS THAT INCLUDE A MIM TYPE CAPACITOR WITH A LOWER ELECTRODE MADE FOR REDUCED RESISTANCE AT AN INTERFACE WITH A METAL FILM
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Patent #:
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|
Issue Dt:
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08/26/2008
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Application #:
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10875572
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Filing Dt:
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06/25/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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LAYOUT METHOD FOR MINIATURIZED MEMORY ARRAY AREA
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|
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Patent #:
|
|
Issue Dt:
|
02/13/2007
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Application #:
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10878486
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Filing Dt:
|
06/29/2004
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Publication #:
|
|
Pub Dt:
|
02/24/2005
| | | | |
Title:
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PLATE VOLTAGE GENERATION CIRCUIT CAPABLE CONTROLLING DEAD BAND
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|
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Patent #:
|
|
Issue Dt:
|
12/06/2005
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Application #:
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10999970
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Filing Dt:
|
12/01/2004
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Publication #:
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|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND DIGITAL MEASURING INSTRUMENT
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|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
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Application #:
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11004796
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Filing Dt:
|
12/07/2004
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Publication #:
|
|
Pub Dt:
|
06/09/2005
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
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Application #:
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11004799
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Filing Dt:
|
12/07/2004
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Publication #:
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|
Pub Dt:
|
06/09/2005
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Title:
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REDUNDANCY SEMICONDUCTOR MEMORY DEVICE WITH ERROR CORRECTION CODE (ECC) CIRCUITS FOR CORRECTING ERRORS IN RECOVERY FUSE DATA
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|
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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11563442
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Filing Dt:
|
11/27/2006
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Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
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MEMORY WITH MEMORY CELLS THAT INCLUDE A MIM TYPE CAPACITOR WITH A LOWER ELECTRODE MADE FOR REDUCED RESISTANCE AT AN INTERFACE WITH A METAL FILM
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|