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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	019529/0767			Pages:	18
		Recorded:	07/05/2007
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 12

Patent #:	5559458	Issue Dt:	09/24/1996	Application #:	08438720	Filing Dt:	05/11/1995
Title:	RESET CIRCUIT FOR A PIPELINED SIGNAL PROCESSOR

Patent #:	6065032	Issue Dt:	05/16/2000	Application #:	09025945	Filing Dt:	02/19/1998
Title:	LOW POWER MULTIPLIER FOR CPU AND DSP

Patent #:	6028756	Issue Dt:	02/22/2000	Application #:	09041543	Filing Dt:	03/11/1998
Title:	USING TOPOLOGICAL FEATURES TO LOWER THE BLOWING CURRENT NEEDED FOR FUSES

Patent #:	6279066	Issue Dt:	08/21/2001	Application #:	09099778	Filing Dt:	06/19/1998
Title:	SYSTEM FOR NEGOTIATING ACCESS TO A SHARED RESOURCE BY ARBITRATION LOGIC IN A SHARED RESOURCE NEGOTIATOR

Patent #:	6076136	Issue Dt:	06/13/2000	Application #:	09099885	Filing Dt:	06/17/1998
Title:	RAM ADDRESS DECODING SYSTEM AND METHOD TO SUPPORT MISALIGNED MEMORY ACCESS

Patent #:	6965974	Issue Dt:	11/15/2005	Application #:	09120126	Filing Dt:	07/22/1998
Title:	DYNAMIC PARTITIONING OF MEMORY BANKS AMONG MULTIPLE AGENTS

Patent #:	5999454	Issue Dt:	12/07/1999	Application #:	09136360	Filing Dt:	08/19/1998
Title:	SENSE AMPLIFIER FOR FLASH MEMORY

Patent #:	6072210	Issue Dt:	06/06/2000	Application #:	09220418	Filing Dt:	12/24/1998
Title:	AN INTEGRATE DRAM CELL HAVING A DRAM CAPACITOR AND A TRANSISTOR

Patent #:	6275842	Issue Dt:	08/14/2001	Application #:	09431851	Filing Dt:	11/02/1999
Title:	LOW POWER MULTIPLIER FOR CPU AND DSP

Patent #:	6539488	Issue Dt:	03/25/2003	Application #:	09451295	Filing Dt:	11/30/1999
Title:	SYSTEM WITH A PLURALITY OF MEDIA ACCESS CONTROL CIRCUITS WITH A SHARED MEMORY FOR STORING DATA AND SYNCHRONIZING DATA FROM A CLOCK DOMAIN TO A HOST CLOCK DOMAIN

Patent #:	6725305	Issue Dt:	04/20/2004	Application #:	09474412	Filing Dt:	12/29/1999
Title:	METHOD AND APPARATUS FOR USING A BUS AS A DATA STORAGE NODE

Patent #:	6535948	Issue Dt:	03/18/2003	Application #:	09583493	Filing Dt:	05/31/2000
Title:	SERIAL INTERFACE UNIT

Assignor

Exec Dt:

01/30/2001

Assignee

1110 AMERICAN PARKWAY NE

ALLENTOWN, PENNSYLVANIA 18109

Correspondence name and address
	DOCKET ADMINISTRATOR
	AGERE SYSTEMS INC.
	ROOM 4U-533C
	400 CONNELL DRIVE
	BERKELEY HEIGHTS, NEW JERSEY 07922-2747

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