Patent Assignment Details
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| Reel/Frame: | 019615/0454 | |
| Pages: | 6 |
| | Recorded: | 07/27/2007 | | |
| Attorney Dkt #: | MT10726TP |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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11829156
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Filing Dt:
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07/27/2007
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Publication #:
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Pub Dt:
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01/29/2009
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Title:
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METHOD FOR FORMING A TRANSISTOR HAVING GATE DIELECTRIC PROTECTION AND STRUCTURE
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Assignee
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| 6501 WILLIAM CANNON WEST |
| LAW DEPT. |
| AUSTIN, TEXAS 78735 |
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Correspondence name and address
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FREESCALE SEMICONDUCTOR, INC.
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7700 W. PARMER LANE
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TX32/PL02
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AUSTIN, TX 78729
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