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Reel/Frame:019690/0647   Pages: 94
Recorded: 08/07/2007
Conveyance: RELEASE OF SECURITY INTEREST
Total properties: 231
Page 1 of 3
Pages: 1 2 3
1
Patent #:
Issue Dt:
07/12/1983
Application #:
06247676
Filing Dt:
03/26/1981
Title:
METHOD AND APPARATUS FOR SEQUENCING ADDRESSES OF A FAST FOURIER TRANSFORM ARRAY
2
Patent #:
Issue Dt:
02/26/1985
Application #:
06499747
Filing Dt:
05/31/1983
Title:
FLUORINE PLASMA OXIDATION OF RESIDUAL SULFUR SPECIES
3
Patent #:
Issue Dt:
08/27/1985
Application #:
06529917
Filing Dt:
09/07/1983
Title:
HIGH SPEED REFERENCELESS BIPOLAR LOGIC GATE WITH MINIMUN INPUT CURRENT
4
Patent #:
Issue Dt:
05/29/1984
Application #:
06529920
Filing Dt:
09/07/1983
Title:
METHOD FOR INTERCONNECTING METALLIC LAYERS
5
Patent #:
Issue Dt:
10/14/1986
Application #:
06530176
Filing Dt:
09/07/1983
Title:
EMITTER COUPLED LOGIC HAVING ENHANCED SPEED CHARACTERISTIC FOR TURN - OFF
6
Patent #:
Issue Dt:
09/03/1985
Application #:
06550528
Filing Dt:
11/09/1983
Title:
DYNAMIC ECL CIRCUIT ADAPTED TO DRIVE LOADS HAVING SIGNIFICANT CAPACITANCE
7
Patent #:
Issue Dt:
10/15/1985
Application #:
06550529
Filing Dt:
11/09/1983
Title:
ECL LOGIC CIRCUIT WITH A BIAS CIRCUIT FOR DYNAMICALLY SWITCHABLE LOW DROP CURRENT SOURCE
8
Patent #:
Issue Dt:
11/05/1985
Application #:
06562802
Filing Dt:
12/19/1983
Title:
ECL GATE WITH SWITCHED LOAD CURRENT SOURCE
9
Patent #:
Issue Dt:
03/18/1986
Application #:
06564812
Filing Dt:
12/22/1983
Title:
OUTPUT VOLTAGE DRIVER WITH TRANSIENT ACTIVE PULL-DOWN
10
Patent #:
Issue Dt:
08/06/1985
Application #:
06567971
Filing Dt:
01/04/1984
Title:
PROCESS FOR FORMING SLOTS HAVING NEAR VERTICAL SIDEWALLS AT THEIR UPPER EXTREMITIES
11
Patent #:
Issue Dt:
04/01/1986
Application #:
06576658
Filing Dt:
02/03/1984
Title:
PROCESS FOR FORMING SLOTS OF DIFFERENT TYPES IN SELF-ALIGNED RELATIONSHIP USING A LATENT IMAGE MASK
12
Patent #:
Issue Dt:
04/12/1988
Application #:
06585315
Filing Dt:
03/01/1984
Title:
CURRENT SOURCE ARRANGEMENT FOR THREE-LEVEL EMITTER-COUPLED LOGIC AND FOUR-LEVEL CURRENT MODE LOGIC
13
Patent #:
Issue Dt:
04/08/1986
Application #:
06593335
Filing Dt:
03/26/1984
Title:
FORMING A CONDUCTIVE, PROTECTIVE LAYER FOR MULTILAYER METALLIZATION
14
Patent #:
Issue Dt:
12/17/1985
Application #:
06597618
Filing Dt:
04/06/1984
Title:
TEMPERATURE TRACKING AND SUPPLY VOLTAGE INDEPENDENT LINE DRIVER FOR ECL CIRCUITS
15
Patent #:
Issue Dt:
12/09/1986
Application #:
06605320
Filing Dt:
04/30/1984
Title:
PHASE DETECTOR
16
Patent #:
Issue Dt:
08/26/1986
Application #:
06682384
Filing Dt:
12/17/1984
Title:
CONTROLLABLE EFFECTIVE RESISTANCE AND PHASE LOCK LOOP WITH CONTROLLABE FILTER
17
Patent #:
Issue Dt:
05/26/1987
Application #:
06697374
Filing Dt:
02/01/1985
Title:
LOW ORDER CHARGE-PUMP FILTER
18
Patent #:
Issue Dt:
08/11/1987
Application #:
06697545
Filing Dt:
02/01/1985
Title:
PHASE DETECTOR AND PHASE-LOCKED LOOP APPARATUS
19
Patent #:
Issue Dt:
06/02/1987
Application #:
06702962
Filing Dt:
02/19/1985
Title:
MULTILEVEL DIFFERENTIAL ECL/CML GATE CIRCUIT
20
Patent #:
Issue Dt:
11/11/1986
Application #:
06707728
Filing Dt:
03/04/1985
Title:
METHOD OF MAKING AN ISOLATION SLOT FOR INTEGRATED CIRCUIT STRUCTURE
21
Patent #:
Issue Dt:
02/10/1987
Application #:
06707730
Filing Dt:
03/04/1985
Title:
METHOD OF MAKING AN INTERGRATED CIRCUIT STRUCTURE WITH SELF-ALIGNED EXTRINSIC BASE FROM EMITTER
22
Patent #:
Issue Dt:
08/12/1986
Application #:
06718393
Filing Dt:
04/01/1985
Title:
METHOD OF FABRICATING INTEGRATED CIRCUIT STRUCTURE HAVING CMOS AND BIPOLAR DEVICES
23
Patent #:
Issue Dt:
12/02/1986
Application #:
06719185
Filing Dt:
04/03/1985
Title:
METHOD FOR PLANARIZING AN ISOLATION SLOT IN AN INTEGRATED CIRCUIT STRUCTURE
24
Patent #:
Issue Dt:
11/18/1986
Application #:
06720824
Filing Dt:
04/08/1985
Title:
METHOD OF MAKING INTEGRATED BIPOLAR SEMICONDUCTOR DEVICE BY FIRST FORMING JUNCTION ISOLATION REGIONS AND RECESSED OXIDE ISOLATION REGIONS WITHOUT BIRDS BEAK
25
Patent #:
Issue Dt:
05/17/1988
Application #:
06730709
Filing Dt:
05/03/1985
Title:
TEMPERATURE COMPENSATION FOR ECL CIRCUITS
26
Patent #:
Issue Dt:
07/28/1987
Application #:
06747517
Filing Dt:
06/21/1985
Title:
FAST BIPOLAR TRANSISTOR FOR INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING SAME
27
Patent #:
Issue Dt:
04/12/1988
Application #:
06759623
Filing Dt:
07/26/1985
Title:
SERIAL PORT SYNCHRONIZER
28
Patent #:
Issue Dt:
04/05/1988
Application #:
06759624
Filing Dt:
07/26/1985
Title:
PROGRAMMABLE DATA-ROUTING MULTIPLEXER
29
Patent #:
Issue Dt:
04/07/1987
Application #:
06759625
Filing Dt:
07/26/1985
Title:
PROCESS FOR SMOOTHING A NON-PLANAR SURFACE
30
Patent #:
Issue Dt:
09/16/1986
Application #:
06770817
Filing Dt:
08/28/1985
Title:
MERGED PMOS/BIPOLAR LOGIC CIRCUITS
31
Patent #:
Issue Dt:
05/26/1987
Application #:
06771386
Filing Dt:
08/30/1985
Title:
ANTI-CORROSION TREATMENT FOR PATTERNING OF METALLIC LAYERS
32
Patent #:
Issue Dt:
05/01/1990
Application #:
06777149
Filing Dt:
09/18/1985
Title:
BIPOLAR AND MOS DEVICES FABRICATED ON SAME INTEGRATED CIRCUIT SUBSTRATE
33
Patent #:
Issue Dt:
11/17/1987
Application #:
06777153
Filing Dt:
09/18/1985
Title:
METHOD OF MAKING A PLANAR STRUCTURE CONTAINING MOS AND BIPOLAR TRANSISTORS
34
Patent #:
Issue Dt:
06/02/1987
Application #:
06794357
Filing Dt:
11/01/1985
Title:
INTEGRATED CIRCUIT FABRICATION PROCESS FOR FORMING A BIPOLAR TRANSISTOR HAVING EXTRINSIC BASE REGIONS
35
Patent #:
Issue Dt:
07/07/1987
Application #:
06817228
Filing Dt:
01/08/1986
Title:
TTL COMPATIBLE MERGED BIPOLAR/CMOS OUTPUT BUFFER CIRCUITS
36
Patent #:
Issue Dt:
05/19/1987
Application #:
06831012
Filing Dt:
02/19/1986
Title:
HIGH-SPEED FULL DIFFERENTIAL AMPLIFIER WITH COMMON MODE REJECTION
37
Patent #:
Issue Dt:
05/26/1987
Application #:
06831020
Filing Dt:
02/19/1986
Title:
HIGH SPEED OPERATIONAL AMPLIFIER
38
Patent #:
Issue Dt:
06/19/1990
Application #:
06836025
Filing Dt:
03/04/1986
Title:
SIGNAL PROCESSOR MEMORY MANAGEMENT UNIT WITH INDIRECT ADDRESSING USING SELECTABLE OFFSETS & MODULO VALUES FOR INDEXED ADDRESS CALCULATIONS
39
Patent #:
Issue Dt:
06/09/1987
Application #:
06836786
Filing Dt:
03/06/1986
Title:
REDUCED POWER/TEMPERATURE CONTROLLED TTL TRI- STATE BUFFER UTILIZING THREE PHASE SPLITTER TRANSISTORS
40
Patent #:
Issue Dt:
08/14/1990
Application #:
06836936
Filing Dt:
03/06/1986
Title:
POINTER INPLEMENTED FIFO CONTROLLER FOR CONVERTING A STANDARD RAM INTO A SIMULATED DUAL FIFO BY CONTROLLING THE RAM,S ADDRESS INPUTS.
41
Patent #:
Issue Dt:
03/14/1989
Application #:
06838993
Filing Dt:
03/12/1986
Title:
FRACTURABLE X-Y STORAGE ARRAY USING A RAM CELL WITH BIDIRECTIONAL SHIFT
42
Patent #:
Issue Dt:
08/18/1987
Application #:
06853504
Filing Dt:
04/18/1986
Title:
DYNAMIC ECL LINE DRIVER CIRCUIT
43
Patent #:
Issue Dt:
09/13/1988
Application #:
06891438
Filing Dt:
07/28/1986
Title:
TIME-SLOT ASSIGNER MULTIPLEXER
44
Patent #:
Issue Dt:
06/07/1988
Application #:
06897686
Filing Dt:
08/18/1986
Title:
VERTICAL SLOT BOTTOM BIPOLAR TRANSISTOR STRUCTURE
45
Patent #:
Issue Dt:
02/28/1989
Application #:
06900949
Filing Dt:
08/27/1986
Title:
DATA ASSEMBLY APPARATUS AND METHOD
46
Patent #:
Issue Dt:
01/26/1988
Application #:
06910595
Filing Dt:
09/23/1986
Title:
IC INPUT CIRCUITRY PROGRAMMABLE FOR REALIZING MULTIPLE FUNCTIONS FROM A SINGLE INPUT
47
Patent #:
Issue Dt:
02/28/1989
Application #:
07035687
Filing Dt:
04/02/1987
Title:
DUAL-PORT TIMING CONTROLLER
48
Patent #:
Issue Dt:
07/25/1989
Application #:
07035817
Filing Dt:
04/03/1987
Title:
PACKET-AT-A-TIME REPORTING IN A DATA LINK CONTROLLER
49
Patent #:
Issue Dt:
08/23/1988
Application #:
07047077
Filing Dt:
05/05/1987
Title:
PHASE DETECTOR AND PHASE-LOCKED LOOP APPARATUS
50
Patent #:
Issue Dt:
05/30/1989
Application #:
07073532
Filing Dt:
07/15/1987
Title:
COMMUNICATION FILTER
51
Patent #:
Issue Dt:
03/07/1989
Application #:
07077252
Filing Dt:
07/24/1987
Title:
DEFECT SKIPPING MECHANISM FOR DISK DRIVES
52
Patent #:
Issue Dt:
02/14/1989
Application #:
07111476
Filing Dt:
10/22/1987
Title:
PROPAGATING FIFO STORAGE DEVICE
53
Patent #:
Issue Dt:
06/11/1991
Application #:
07173325
Filing Dt:
03/25/1988
Title:
FDDI BIT ERROR RATE TESTER
54
Patent #:
Issue Dt:
01/02/1990
Application #:
07193232
Filing Dt:
05/11/1988
Title:
INTEGRATED SCR CURRENT SOURCING SINKING DEVICE
55
Patent #:
Issue Dt:
08/29/1989
Application #:
07205636
Filing Dt:
06/13/1988
Title:
ASYNCHRONOUS INTERRUPT STATUS BIT CIRCUIT
56
Patent #:
Issue Dt:
04/03/1990
Application #:
07226610
Filing Dt:
08/01/1988
Title:
METHOD FOR TRANSFER OF DATA BETWEEN A MEDIA ACCESS CONTROLLER AND BUFFER MEMORY IN A TOKEN RING NETWORK
57
Patent #:
Issue Dt:
05/15/1990
Application #:
07251309
Filing Dt:
09/30/1988
Title:
MODULAR TEST STRUCTURE FOR SINGLE CHIP DIGITAL EXCHANGE CONTROLLER
58
Patent #:
Issue Dt:
02/19/1991
Application #:
07262658
Filing Dt:
10/25/1988
Title:
SYSTEM FOR DETECTING AND CORRECTING ERRORS GENERATED BY ARITHMETIC LOGIC UNITS
59
Patent #:
Issue Dt:
12/26/1989
Application #:
07268396
Filing Dt:
11/07/1988
Title:
RELIABLE RECOVERY OF DATA IN ENCODER/DECODER
60
Patent #:
Issue Dt:
09/05/1989
Application #:
07272563
Filing Dt:
11/17/1988
Title:
A RAM CELL HAVING MEANS FOR CONTROLLING A BIDIRECTIONAL SHIFT
61
Patent #:
Issue Dt:
12/18/1990
Application #:
07278724
Filing Dt:
12/02/1988
Title:
METHODS AND APPARATUS FOR PERFORMING RESTRICTED TOKEN OPERATIONS ON AN FDDI NETWORK
62
Patent #:
Issue Dt:
08/21/1990
Application #:
07281991
Filing Dt:
12/09/1988
Title:
METHOD AND APPARATUS FOR CONFIGURING DATA PATHS WITHIN A SUPERNET STATION
63
Patent #:
Issue Dt:
09/10/1991
Application #:
07311411
Filing Dt:
02/14/1989
Title:
DATA LINK CONTROLER WITH FLEXIBLE MULTIPLEXER
64
Patent #:
Issue Dt:
11/05/1991
Application #:
07339722
Filing Dt:
04/17/1989
Title:
APPARATUS AND METHOD FOR PROPER BYTE ALIGNMENT IN AN ENCODER/DECODER
65
Patent #:
Issue Dt:
12/18/1990
Application #:
07343215
Filing Dt:
04/26/1989
Title:
METHOD AND APPARATUS FOR TESTING A BINARY COUNTER
66
Patent #:
Issue Dt:
11/06/1990
Application #:
07343622
Filing Dt:
04/27/1989
Title:
PROGRAMMABLE THRESHOLD DETECTION LOGIC FOR A DIGITAL STORAGE BUFFER
67
Patent #:
Issue Dt:
08/11/1992
Application #:
07343810
Filing Dt:
04/27/1989
Title:
BIT RESIDUE CORRECTION IN A DLC RECEIVER
68
Patent #:
Issue Dt:
11/26/1991
Application #:
07349564
Filing Dt:
05/09/1989
Title:
HIGH SPEED STATIC RAM SENSING SYSTEM
69
Patent #:
Issue Dt:
10/15/1991
Application #:
07359022
Filing Dt:
05/30/1989
Title:
SYSTEM AND METHOD FOR PROVIDING DIGITAL FILTER COEFFICIENTS
70
Patent #:
Issue Dt:
03/06/1990
Application #:
07368083
Filing Dt:
06/16/1989
Title:
DATA PROTOCOL CONTROLLER
71
Patent #:
Issue Dt:
05/19/1992
Application #:
07376882
Filing Dt:
07/06/1989
Title:
HIGH SPEED DIGITAL TO ANALOG TO DIGITAL COMMUNICATION SYSTEM
72
Patent #:
Issue Dt:
08/21/1990
Application #:
07407000
Filing Dt:
09/14/1989
Title:
DYNAMIC PLA CIRCUIT WITH NO "VIRTUAL GROUNDS"
73
Patent #:
Issue Dt:
02/19/1991
Application #:
07428614
Filing Dt:
10/30/1989
Title:
APPARATUS ADAPTABLE FOR USE IN EFFECTING COMMUNICATIONS BETWEEN AN ANALOG DEVICE AND A DIGITAL DEVICE
74
Patent #:
Issue Dt:
03/12/1991
Application #:
07428628
Filing Dt:
10/30/1989
Title:
APPARATUS HAVING A MODULAR DECIMATION ARCHITECTURE
75
Patent #:
Issue Dt:
02/26/1991
Application #:
07434271
Filing Dt:
10/30/1989
Title:
APPARATUS HAVING SHARED MODULAR ARCHITECTURE FOR DECIMATION AND INTERPOLATION
76
Patent #:
Issue Dt:
06/04/1991
Application #:
07434797
Filing Dt:
11/13/1989
Title:
PROGRAMMABLE LOGIC ARRAY APPARATUS
77
Patent #:
Issue Dt:
08/14/1990
Application #:
07443088
Filing Dt:
11/27/1989
Title:
ENHANCED UNIVERSAL ASYNCHRONOUS RECEIVER-TRANSMITTER
78
Patent #:
Issue Dt:
05/28/1991
Application #:
07462625
Filing Dt:
01/09/1990
Title:
CAPACITIVELY COUPLED READ-ONLY MEMORY
79
Patent #:
Issue Dt:
07/30/1991
Application #:
07480401
Filing Dt:
02/15/1990
Title:
CMOS PRECHARGE AND EQUALIZATION CIRCUIT
80
Patent #:
Issue Dt:
12/10/1991
Application #:
07509916
Filing Dt:
04/16/1990
Title:
ECL OUTPUT BUFFER CIRCUIT WITH IMRPOVED COMPENSATION
81
Patent #:
Issue Dt:
08/08/1995
Application #:
07516984
Filing Dt:
04/30/1990
Title:
AN ADDRESS MODULO ADJUST UNIT FOR A MEMORY MANAGEMENT UNIT FOR MONOLITHIC DIGITAL SIGNAL PROCESSOR
82
Patent #:
Issue Dt:
03/10/1992
Application #:
07528864
Filing Dt:
05/25/1990
Title:
FIFO INFORMATION STORAGE APPARATUS INCLUDING STATUS AND LOGIC MODULES FOR EACH CELL
83
Patent #:
Issue Dt:
08/27/1991
Application #:
07529366
Filing Dt:
05/29/1990
Title:
METHOD OF AND SYSTEM FOR TRANSFERRING MULTIPLE PRIORITY QUEUES INTO MULTIPLE LOGICAL FIFOS USING A SINGLE PHYSICAL FIFO
84
Patent #:
Issue Dt:
07/21/1992
Application #:
07566743
Filing Dt:
08/13/1990
Title:
RAM BUFFER CONTROLLER FOR PROVIDING SIMULATED FIRST-IN-FIRST-OUT (FIFO) BUFFERS IN A RANDOM ACCESS MEMORY
85
Patent #:
Issue Dt:
10/05/1993
Application #:
07579721
Filing Dt:
09/10/1990
Title:
ERROR DETECTION AND CORRECTION CIRCUIT
86
Patent #:
Issue Dt:
09/21/1993
Application #:
07588194
Filing Dt:
09/26/1990
Title:
SYSTEM AND METHOD FOR PROCESSOR BUS USE
87
Patent #:
Issue Dt:
06/15/1993
Application #:
07589065
Filing Dt:
09/27/1990
Title:
KEYPAD STATUS REPORTING SYSTEM
88
Patent #:
Issue Dt:
08/10/1993
Application #:
07589090
Filing Dt:
09/27/1990
Title:
KEYPAD MONITOR WITH KEYPAD ACTIVITY-BASED ACTIVATION
89
Patent #:
Issue Dt:
03/30/1993
Application #:
07589327
Filing Dt:
12/03/1990
Title:
FULLY-INTEGRATED TELEPHONE UNIT
90
Patent #:
Issue Dt:
03/29/1994
Application #:
07589380
Filing Dt:
09/27/1990
Title:
MICROPROCESSOR TO EXTERNAL DEVICE SERIAL BUS COMMUNICATION SYSTEM
91
Patent #:
Issue Dt:
06/04/1991
Application #:
07589402
Filing Dt:
09/27/1990
Title:
METHOD FOR OPERATING AN APPARATUS FOR FACILITATING COMMUNICATIONS
92
Patent #:
Issue Dt:
12/29/1992
Application #:
07678510
Filing Dt:
04/01/1991
Title:
COUNTER CELL INCLUDING A LATCH CIRCUIT, CONTROL CIRCUIT AND A PULL-UP CIRCUIT
93
Patent #:
Issue Dt:
03/08/1994
Application #:
07712944
Filing Dt:
06/10/1991
Title:
PROCESSING SYSTEM INCLUDING MEMORY SELECTION OF MULTIPLE MEMORIES AND METHOD IN AN INTERRUPT ENVIRONMENT
94
Patent #:
Issue Dt:
06/16/1992
Application #:
07732383
Filing Dt:
07/18/1991
Title:
POWER REDUCTION DESIGN FOR ECL OUTPUTS THAT IS INDEPENDENT OF RANDOM TERMINATION VOLTAGE
95
Patent #:
Issue Dt:
12/21/1993
Application #:
07766814
Filing Dt:
09/26/1991
Title:
SYSTEM FOR CONVERTING A FLOATING POINT SIGNED MAGNITUDE BINARY NUMBER TO A TWO'S COMPLEMENT BINARY NUMBER
96
Patent #:
Issue Dt:
05/30/1995
Application #:
07783837
Filing Dt:
10/29/1991
Title:
DIGITAL MULTIPLICATION AND ACCUMULATION SYSTEM
97
Patent #:
Issue Dt:
02/23/1993
Application #:
07785497
Filing Dt:
10/31/1991
Title:
APPARATUS FOR GENERATING A SINUSOIDAL OUTPUT SIGNAL
98
Patent #:
Issue Dt:
08/04/1992
Application #:
07794995
Filing Dt:
11/19/1991
Title:
METHOD AND APPARATUS FOR DETERMINING THE PRODUCT OF TWO NUMBERS
99
Patent #:
Issue Dt:
08/16/1994
Application #:
07796318
Filing Dt:
11/22/1991
Title:
APPARATUS FOR ADAPTIVELY TUNING TO A RECEIVED PERIODIC SIGNAL
100
Patent #:
Issue Dt:
02/15/1994
Application #:
07824029
Filing Dt:
01/22/1992
Title:
COMPARATOR CIRCUIT
Assignor
1
Exec Dt:
07/27/2007
Assignee
1
4509 FREIDRICH LANE
AUSTIN, TEXAS 78744
Correspondence name and address
TRACEY D. BENNETT
C/O PAUL, HASTINGS, JANOFSKY ET AL
75 E. 55TH STREET
NEW YORK, NY 10022

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