Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 019719/0203 | |
| Pages: | 2 |
| | Recorded: | 08/21/2007 | | |
| Attorney Dkt #: | 24661-US-187 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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07/26/2011
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Application #:
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11763448
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Filing Dt:
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06/15/2007
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Publication #:
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Pub Dt:
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02/28/2008
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Title:
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DELAY CIRCUIT, TEST APPARATUS, STORAGE MEDIUM SEMICONDUCTOR CHIP, INITIALIZING CIRCUIT AND INITIALIZING METHOD
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Assignee
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| 1-32-1, ASAHI-CHO, NERIMA-KU |
| TOKYO, JAPAN 179-0071 |
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Correspondence name and address
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JIANQ CHYUN INTELLECTUAL PROPERTY
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7F-1, NO.100, ROOSEVELT RD., SEC.2
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TAIPEI, 100 TAIWAN
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