Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 020092/0060 | |
| Pages: | 5 |
| | Recorded: | 11/09/2007 | | |
Attorney Dkt #: | CITIBANK PATENT RELEASE |
Conveyance: | RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08399809
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Filing Dt:
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03/07/1995
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Title:
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ULTRA-SMALL SEMICONDUCTOR DEVICES HAVING PATTERNED EDGE PLANAR SURFACES
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Patent #:
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Issue Dt:
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04/16/1996
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Application #:
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08425733
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Filing Dt:
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04/20/1995
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Title:
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ELEVATED-GATE FIELD EFFECT TRANSISTOR STRUCTURE AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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02/25/1997
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Application #:
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08434867
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Filing Dt:
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05/04/1995
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Title:
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HETEROSTRUCTURE FIELD EFFECT DEVICE HAVING REFRACTORY OHMIC CONTACT DIRECTLY ON CHANNEL LAYER AND METHOD FOR MAKING
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08556686
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Filing Dt:
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11/13/1995
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Title:
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HETEROJUNCTION INTERBAND TUNNEL DIODES WITH IMPROVED P/V CURRENT RATIOS
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Patent #:
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Issue Dt:
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05/20/1997
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Application #:
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08587434
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Filing Dt:
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01/17/1996
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Title:
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METHOD FOR FABRICATING AN ELEVATED GATE FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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01/20/1998
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Application #:
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08609704
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Filing Dt:
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03/01/1996
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Title:
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MASKING METHODS DURING SEMICONDUCTOR DEVICE FABRICATION
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Assignee
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6501 WILLIAM CANNON WEST |
LAW DEPT. |
AUSTIN, TEXAS 78735 |
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Correspondence name and address
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FREESCALE SEMICONDUCTOR, INC.
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7700 W. PARMER LANE
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TX32/PL02
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AUSTIN, TX 78729
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