Patent Assignment Details
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| Reel/Frame: | 020140/0859 | |
| Pages: | 2 |
| | Recorded: | 11/13/2007 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11896290
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Filing Dt:
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08/30/2007
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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Impedance matching method, a method for manufacturing signal processing circuits and a signal processing circuit and a radio apparatus using the same
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Assignee
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| 5-5, KEIHAN-HONDORI 2-CHOME, MORIGUCHI-SHI |
| OSAKA, JAPAN |
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Correspondence name and address
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MCDERMOTT WILL & EMERY LLP
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600 13TH STREET, N.W.
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WASHINGTON, D.C. 20005-3096
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