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Patent Assignment Details

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Reel/Frame:	020166/0195			Pages:	8
		Recorded:	11/28/2007
Attorney Dkt #:	IV PATENTS
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 11

Patent #:	5099436	Issue Dt:	03/24/1992	Application #:	07266722	Filing Dt:	11/03/1988
Title:	METHODS AND APPARATUS FOR PERFORMING SYSTEM FAULT DIAGNOSIS

Patent #:	5067099	Issue Dt:	11/19/1991	Application #:	07335464	Filing Dt:	04/10/1989
Title:	METHODS AND APPARATUS FOR MONITORING SYSTEM PERFORMANCE

Patent #:	6097095	Issue Dt:	08/01/2000	Application #:	09328644	Filing Dt:	06/09/1999
Title:	ADVANCED FABRICATION METHOD OF INTEGRATED CIRCUITS WITH BORDERLESS VIAS AND LOW DIELECTRIC-CONSTANT INTER-METAL DIELECTRICS

Patent #:	6770975	Issue Dt:	08/03/2004	Application #:	09328646	Filing Dt:	06/09/1999
Publication #:	US20020130416	Pub Dt:	09/19/2002
Title:	INTEGRATED CIRCUITS WITH MULTIPLE LOW DIELECTRIC-CONSTANT INTER-METAL DIELECTRICS

Patent #:	6395607	Issue Dt:	05/28/2002	Application #:	09328647	Filing Dt:	06/09/1999
Title:	INTEGRATED CIRCUIT FABRICATION METHOD FOR SELF-ALIGNED COPPER DIFFUSION BARRIER

Patent #:	6452275	Issue Dt:	09/17/2002	Application #:	09328649	Filing Dt:	06/09/1999
Publication #:	US20020113315	Pub Dt:	08/22/2002
Title:	FABRICATION OF INTEGRATED CIRCUITS WITH BORDERLESS VIAS

Patent #:	6498399	Issue Dt:	12/24/2002	Application #:	09391721	Filing Dt:	09/08/1999
Publication #:	US20020142577	Pub Dt:	10/03/2002
Title:	LOW DIELECTRIC-CONSTANT DIELECTRIC FOR ETCHSTOP IN DUAL DAMASCENE BACKEND OF INTEGRATED CIRCUITS

Patent #:	6287955	Issue Dt:	09/11/2001	Application #:	09718787	Filing Dt:	11/22/2000
Title:	Integrated circuits with multiple low dielectric-constant inter-metal dielectrics

Patent #:	6504247	Issue Dt:	01/07/2003	Application #:	10058997	Filing Dt:	01/29/2002
Publication #:	US20020086487	Pub Dt:	07/04/2002
Title:	AN INTEGRATED HAVING A SELF-ALIGNED CU DIFFUSION BARRIER

Patent #:	6559045	Issue Dt:	05/06/2003	Application #:	10170612	Filing Dt:	06/12/2002
Publication #:	US20020158283	Pub Dt:	10/31/2002
Title:	FABRICATION OF INTEGRATED CIRCUITS WITH BORDERLESS VIAS

Patent #:	NONE	Issue Dt:		Application #:	10843896	Filing Dt:	05/12/2004
Publication #:	US20040207091	Pub Dt:	10/21/2004
Title:	Integrated circuits with multiple low dielectric-constant inter-metal dielectrics

Assignors

Exec Dt:

12/01/1999

Exec Dt:

12/01/1999

Assignee

101 COLUMBIA ROAD

MORRISTOWN, NEW JERSEY 07960

Correspondence name and address
	JULIANNE HOLLAND
	101 COLUMBIA ROAD
	BLDG. SOL-3
	MORRISTOWN, NJ 07960

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