Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 020180/0395 | |
| Pages: | 5 |
| | Recorded: | 11/30/2007 | | |
| Attorney Dkt #: | QIM 2007 VJ 31940 (VJ) |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11857703
|
Filing Dt:
|
09/19/2007
|
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
|
Title:
|
Integrated Circuits; Methods for Manufacturing an Integrated Circuit and Memory Module
|
|
|
Assignees
|
|
|
|
|
| GUSTAV-HEINEMANN-RING 212 |
| MUNICH, GERMANY 81739 |
|
|
|
|
|
| 224 BLD. JOHN KENNEDY |
| CORBEIL ESSONNES CEDEX, FRANCE ZIP 31 P 91105 |
|
|
Correspondence name and address
|
| |
SLATER & MATSIL, L.L.P
|
| |
17950 PRESTON RD.
|
| |
SUITE 1000
|
| |
DALLAS, TX 75252
|
Search Results as of:
05/14/2024 07:50 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
