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Reel/Frame:021105/0594   Pages: 7
Recorded: 06/17/2008
Attorney Dkt #:DEIT-GEN
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 15
1
Patent #:
Issue Dt:
01/30/1990
Application #:
07297668
Filing Dt:
01/17/1989
Title:
DIGITAL SPEECH INTERPOLATION SYSTEM AND SPEECH DETECTOR
2
Patent #:
Issue Dt:
11/26/1991
Application #:
07382316
Filing Dt:
07/20/1989
Title:
METHOD AND SYSTEM FOR MONITORING THE NUMBER OF AVAILABLE BUFFERS
3
Patent #:
Issue Dt:
11/17/1992
Application #:
07697701
Filing Dt:
05/09/1991
Title:
ADAPTIVE EQUALIZER WITH MIDBURST CORRECTION CAPABILITY
4
Patent #:
Issue Dt:
05/25/1993
Application #:
07808606
Filing Dt:
12/17/1991
Title:
ADAPTIVE EQUALIZER
5
Patent #:
Issue Dt:
09/21/1993
Application #:
07872322
Filing Dt:
04/23/1992
Title:
AUTOMATIC EQUALIZER FOR A DATA TRANSMISSION CHANNEL
6
Patent #:
Issue Dt:
10/29/1996
Application #:
08494932
Filing Dt:
06/26/1995
Title:
CLOCK SIGNAL FAULT DETECTOR
7
Patent #:
Issue Dt:
12/30/1997
Application #:
08508045
Filing Dt:
07/27/1995
Title:
CLOCK RECOVERY CIRCUIT EMPLOYING DELAY-AND-DIFFERENCE CIRCUIT AND PULSE-SEQUENCE DETECTION
8
Patent #:
Issue Dt:
07/07/1998
Application #:
08564657
Filing Dt:
11/29/1995
Title:
BIT-PHASE ALIGNING CIRCUIT
9
Patent #:
Issue Dt:
10/13/1998
Application #:
08665462
Filing Dt:
06/18/1996
Title:
DEVICE AND METHOD FOR CONVERTING A TRANSMISSION RATE BY ADDING DUMMY DATA
10
Patent #:
Issue Dt:
05/18/1999
Application #:
08958402
Filing Dt:
10/29/1997
Title:
CONTENT ADRESSABLE MEMORY DEVICE
11
Patent #:
Issue Dt:
02/02/1999
Application #:
08978482
Filing Dt:
11/25/1997
Title:
CONNECTION PIN
12
Patent #:
Issue Dt:
08/07/2001
Application #:
09113297
Filing Dt:
07/10/1998
Title:
ORTHOGONAL TYPE THREE-AXIS ROBOT AND A CONTROL METHOD THEREOF
13
Patent #:
Issue Dt:
09/25/2001
Application #:
09247934
Filing Dt:
02/11/1999
Title:
EXCHANGE
14
Patent #:
Issue Dt:
10/28/2003
Application #:
09316116
Filing Dt:
05/20/1999
Title:
FEEDER CIRCUIT
15
Patent #:
Issue Dt:
07/13/2004
Application #:
10026820
Filing Dt:
12/27/2001
Publication #:
Pub Dt:
09/19/2002
Title:
CACHE MEMORY CAPABLE OF REDUCCING AREA OCCUPIED BY DATA MEMORY MACRO UNITS
Assignor
1
Exec Dt:
05/13/2008
Assignee
1
1209 ORANGE STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
SADLER, BREEN, MORASCH, AND COLBY PS
422 WEST RIVERSIDE AVENUE
SUITE 424
SPOKANE, WA 99201

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