Patent Assignment Details
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| Reel/Frame: | 021210/0547 | |
| Pages: | 4 |
| | Recorded: | 07/09/2008 | | |
| Attorney Dkt #: | QIM 2007 P 52544 US |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12118560
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Filing Dt:
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05/09/2008
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Publication #:
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Pub Dt:
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11/12/2009
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Title:
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Memory Cell Arrangement and Method for Reading State Information From a Memory Cell Bypassing an Error Detection Circuit
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Assignee
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| KOENIGSBRUECKER STR. 180 |
| DRESDEN, GERMANY 01099 |
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Correspondence name and address
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SLATER & MATSIL, L.L.P.
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17950 PRESTON ROAD
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SUITE 1000
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DALLAS, TX 75252
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05/10/2024 02:32 AM
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