Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 021941/0885 | |
| Pages: | 3 |
| | Recorded: | 12/08/2008 | | |
| Attorney Dkt #: | 2134.1001 |
| Conveyance: | RECORD TO CORRECT ASSIGNEE'S ADDRESS TO SPECIFY FUJITSU MICROELECTRONICS LIMITED, 7-1 NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU, TOKYO 163-0722 JAPAN |
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Total properties:
1
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Patent #:
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Issue Dt:
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09/28/2010
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Application #:
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12232178
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Filing Dt:
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09/11/2008
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Publication #:
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Pub Dt:
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04/23/2009
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT AND DEBUG MODE DETERMINATION METHOD
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Assignee
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| 7-1 NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU |
| TOKYO 163-0722, JAPAN |
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Correspondence name and address
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STAAS & HALSEY LLP
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ATTENTION: H. J. STAAS
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1201 NEW YORK AVE., N.W., SUITE 700
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WASHINGTON, D.C. 20005
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