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Patent Assignment Details
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Reel/Frame:021998/0645   Pages: 29
Recorded: 12/12/2008
Attorney Dkt #:100698-06001
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1320
Page 14 of 14
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14
1
Patent #:
Issue Dt:
03/11/2008
Application #:
11589139
Filing Dt:
10/30/2006
Publication #:
Pub Dt:
11/01/2007
Title:
REFERENCE VOLTAGE GENERATION CIRCUIT
2
Patent #:
Issue Dt:
07/17/2007
Application #:
11600847
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
03/15/2007
Title:
ANALOG FILTER CIRCUIT AND ADJUSTMENT METHOD THEREOF
3
Patent #:
Issue Dt:
04/22/2008
Application #:
11640906
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
05/03/2007
Title:
MEMORY CONTROL DEVICE AND MEMORY CONTROL METHOD
4
Patent #:
Issue Dt:
05/27/2008
Application #:
11641767
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
05/31/2007
Title:
SEMICONDUCTOR MEMORY
5
Patent #:
Issue Dt:
02/12/2008
Application #:
11643888
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
05/10/2007
Title:
INPUT/OUTPUT LOGICAL CIRCUIT
6
Patent #:
Issue Dt:
10/14/2008
Application #:
11645537
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
02/21/2008
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY
7
Patent #:
Issue Dt:
08/19/2008
Application #:
11650485
Filing Dt:
01/08/2007
Publication #:
Pub Dt:
05/24/2007
Title:
LEVEL CONVERSION CIRCUIT
8
Patent #:
Issue Dt:
10/16/2007
Application #:
11652589
Filing Dt:
01/12/2007
Publication #:
Pub Dt:
05/17/2007
Title:
SEMICONDUCTOR DEVICE INCLUDING VOLTAGE LEVEL CONVERSION OUTPUT CIRCUIT
9
Patent #:
Issue Dt:
08/05/2008
Application #:
11652590
Filing Dt:
01/12/2007
Publication #:
Pub Dt:
05/24/2007
Title:
SEMICONDUCTOR DEVICE INCLUDING VOLTAGE LEVEL CONVERSION OUTPUT CIRCUIT
10
Patent #:
Issue Dt:
10/28/2008
Application #:
11704951
Filing Dt:
02/12/2007
Publication #:
Pub Dt:
06/21/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
11
Patent #:
Issue Dt:
09/02/2008
Application #:
11707128
Filing Dt:
02/16/2007
Publication #:
Pub Dt:
06/28/2007
Title:
SEMICONDUCTOR MEMORY HAVING A DUMMY SIGNAL LINE CONNECTED TO DUMMY MEMORY CELL
12
Patent #:
Issue Dt:
11/18/2008
Application #:
11713029
Filing Dt:
03/02/2007
Publication #:
Pub Dt:
07/05/2007
Title:
SEMICONDUCTOR MEMORY DEVICE CHANGING REFRESH INTERVAL DEPENDING ON TEMPERATURE
13
Patent #:
Issue Dt:
04/22/2008
Application #:
11714766
Filing Dt:
03/07/2007
Publication #:
Pub Dt:
08/23/2007
Title:
SEMICONDUCTOR MEMORY
14
Patent #:
Issue Dt:
01/08/2008
Application #:
11715851
Filing Dt:
03/09/2007
Publication #:
Pub Dt:
07/05/2007
Title:
SEMICONDUCTOR MEMORY
15
Patent #:
Issue Dt:
03/25/2008
Application #:
11790831
Filing Dt:
04/27/2007
Publication #:
Pub Dt:
08/30/2007
Title:
MEMORY CIRCUIT WITH AUTOMATIC PRECHARGE FUNCTION, AND INTEGRATED CIRCUIT DEVICE WITH AUTOMATIC INTERNAL COMMAND FUNCTION
16
Patent #:
Issue Dt:
12/04/2007
Application #:
11790832
Filing Dt:
04/27/2007
Publication #:
Pub Dt:
08/23/2007
Title:
MEMORY CIRCUIT WITH AUTOMATIC PRECHARGE FUNCTION, AND INTEGRATED CIRCUIT DEVICE WITH AUTOMATIC INTERNAL COMMAND FUNCTION
17
Patent #:
Issue Dt:
03/25/2008
Application #:
11802454
Filing Dt:
05/23/2007
Publication #:
Pub Dt:
09/20/2007
Title:
MIDPOINT POTENTIAL GENERATING CIRCUIT FOR USE IN A SEMICONDUCTOR DEVICE
18
Patent #:
Issue Dt:
08/26/2008
Application #:
11812144
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
10/25/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
19
Patent #:
Issue Dt:
05/06/2008
Application #:
11878366
Filing Dt:
07/24/2007
Publication #:
Pub Dt:
01/24/2008
Title:
OPERATIONAL AMPLIFIER AND METHOD FOR CANCELING OFFSET VOLTAGE OF OPERATIONAL AMPLIFIER
20
Patent #:
Issue Dt:
Application #:
UNAVAILABLE
Filing Dt:
Title:
Assignor
1
Exec Dt:
11/04/2008
Assignee
1
7-1, NISHI-SHINJUKU 2-CHOME
SHINJUKU-KU, TOKYO 163-0722, JAPAN
Correspondence name and address
ARENT FOX LLP
1050 CONNECTICUT AVENUE, N.W., SUITE 400
WASHINGTON, D.C. 20036-5339

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