Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 022672/0737 | |
| Pages: | 3 |
| | Recorded: | 05/12/2009 | | |
| Attorney Dkt #: | T&A-5771 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11719112
|
Filing Dt:
|
02/06/2009
|
|
Publication #:
|
|
Pub Dt:
|
05/21/2009
| | | | |
|
Title:
|
MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
Assignee
|
|
|
|
|
| 6-2, OTEMACHI 2-CHOME |
| CHIYODA-KU, TOKYO, JAPAN 100-0004 |
|
|
Correspondence name and address
|
| |
MATTINGLY & MALUR, P.C.
|
| |
1800 DIAGONAL RD.
|
| |
SUITE 370
|
| |
ALEXANDRIA, VA 22314
|
Search Results as of:
04/29/2024 10:40 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
